Carnegie Mellon University

Andrzej Strojwas

Andrzej Strojwas

Keithley Professor, Electrical and Computer Engineering

Address 5000 Forbes Avenue
Pittsburgh, PA 15213


Andrzej J. Strojwas is the Joseph F. and Nancy Keithley Professor of Electrical and Computer Engineering at Carnegie Mellon University. Since 1997, he has served as Chief Technologist at PDF Solutions. He has held positions at Harris Semiconductor Co., AT&T Bell Laboratories, Texas Instruments, NEC, HITACHI, SEMATECH and KLA-Tencor.

He received multiple awards for the best papers published in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Semiconductor Manufacturing and IEEE-ACM Design Automation Conference. Dr. Strojwas is a recipient of the SRC Inventor Recognition Award. He was the Editor of the IEEE Transactions on CAD of ICAS from 1987 to 1989 and served as Technical Program Chairman of the 1988 ICCAD and Conference Chairman of the 1989 ICCAD. In 1990, he was elected IEEE Fellow.

Dr. Strojwas received a Master of Science degree in Electrical Engineering from the Technical University of Warsaw, Poland, and his Ph.D. from Carnegie Mellon University in Pittsburgh.


Ph.D., 1982 
Electrical Engineering 
Carnegie Mellon University

M.S., 1976 
Electrical Engineering 
Technical University of Warsaw


CAD for Analog/Digital ICs

The design and manufacturing of the state-of-the-art integrated circuits (ICs) have become extremely challenging due to ever-increasing complexity and miniaturization. ICs must be designed to obtain best possible performance (e.g., speed) while minimizing power dissipation and must be manufactured at economically acceptable yield levels. Professor Strojwas research addresses both the design and manufacturing of ULSICs.

Design for Manufacturability

This research is aimed at analysis and design of ULSICs that take into account the technology capabilities and manufacturing fluctuations. The specific projects include:

  • Statistical timing verification
  • Efficient and accurate 3-D parasitic element extraction
  • Layout printability analysis using 3-D lithography/topography simulators
  • Manufacturability analysis of low power CMOS technology solutions

Statistical Control and Diagnosis of ULSIC Manufacturing

Research in this area covers the diagnosis of reasons responsible for yield loss, such as defects and excessive process fluctuations. The specific projects include:

  • Optimization of sampling strategy for in-line wafer inspection
  • Modeling of contamination to defect transformation
  • Diagnostic systems for ULSIC manufacturing


  • Statistically based CAD/CAM of VLSI circuits