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Technical Program
Saturday, March 13, 2010
Full Day (refer to individual event pages for start and finish time)
- Workshop on I/O Virtualization (WIOV), Scott Rixner (rixner@rice.edu)
- Workshop on Interaction Between Compilers and Computer Architectures (INTERACT), Alex Jones (akjones@ece.pitt.edu)
- Tutorial on Performance Monitoring using Hardware Performance Events , Ramesh Peri (Ramesh.v.peri@intel.com)
8:00-9:00. Breakfast
10:00- 10:45. Morning break
12:00- 1:45. Lunch (for Full Day Saturday attendees)
3:00- 3:45. Afternoon break
Sunday, March 14, 2010
Full Day (refer to individual event pages for start and finish time)
- Workshop on General-Purpose Computation on Graphics Processing Units (GPGPU), David Kaeli (kaeli@ece.neu.edu)
Morning (refer to individual event pages for start and finish time)
- Tutorial on the Rodinia Benchmark Suite for Heterogeneous Computing, Kevin Skadron (skadron@cs.virginia.edu)
- Tutorial on Emerging Technologies and Their Impact on System Design, Norm Jouppi (Norm.Jouppi@hp.com)
Afternoon (refer to individual event pages for start and finish time)
- Exascale Evaluation and Research Techniques Workshop (EXERT), Tom Wenisch (twenisch@umich.edu)
- Workshop on Architecting Memory Technologies (WAMT), Shih-Lien Lu (shih-lien.l.lu@intel.com)
8:00-9:00. Breakfast
10:00- 10:45. Morning break
12:00- 1:45. Lunch (for Full Day Sunday attendees)
3:00- 3:45. Afternoon break
6:30- 9:30. Opening Reception and Poster Session, Conference Hotel
Monday, March 15, 2010
8:45- 9:00. Chairs' Welcome
9:00- 9:50. Session 1: Novel Architectures
- Dynamically Replicated Memory: Building Reliable Systems from Nanoscale Resistive Memories, Engin Ipek, Jeremy Condit, Edmund B. Nightingale, Doug Burger and Thomas Moscibroda (University of Rochester / Microsoft Research)
- A Power-efficient All-optical On-chip Interconnect Using Wavelength-based Oblivious Routing, Nevin Kirman and Jose Martinez (Cornell University)
9:50-10:40. Session 2: Compilers and Runtime Systems
- A Real System Evaluation of Hardware Atomicity for Software Speculation, Naveen Neelakantam, David Ditzel and Craig Zilles (University of Illinois at Urbana-Champaign; Intel)
- Dynamic filtering: multi-purpose architecture support for language runtime systems, Tim Harris, Adrian Cristal, Sasa Tomic and Osman Unsal (Microsoft Research)
10:40-11:10. Morning Break.
11:10-12:10. Keynote Address
* Technology for Developing Regions: Moore's Law is Not Enough, Eric Brewer (University of California, Berkeley)
12:10-1:40. Lunch.
1:40-2:55. Session 3: Parallel Programming 1
- CoreDet: A Compiler and Runtime System for Deterministic Multithreaded Execution, Tom Bergan, Owen Anderson, Joe Devietti, Luis Ceze and Dan Grossman, (University of Washington)
- Speculative Parallelization Using Software Multi-threaded Transactions, Arun Raman, Hanjun Kim, Thomas R. Mason, Thomas B. Jablin and David I. August, (Princeton University)
- Respec: Efficient online multiprocessor replay via speculation and external determinism, Dongyoon Lee, Benjamin Wester, Kaushik Veeraraghavan, Satish Narayanasamy, Peter Chen and Jason Flinn (University of Michigan)
2:55-3:25. Afternoon Break
3:25-5:05. Session 4: Scheduling in Parallel Systems
- Probabilistic Job Symbiosis Modeling for SMT Processor Scheduling, Stijn Eyerman and Lieven Eeckhout, (Ghent University)
- Request Behavior Variations, Kai Shen, (University of Rochester)
- Decoupling contention management from scheduling, Ryan Johnson, Radu Stoica, Anastasia Ailamaki and Todd Mowry, (Ecole Polytechnique Federale de Lausanne; Carnegie Mellon University)
- Addressing Shared Resource Contention in Multicore Processors Via Scheduling, Sergey Zhuravlev, Sergey Blagodurov and Alexandra Fedorova, (Simon Fraser University)
5:30-7:00. Wild and Crazy Ideas (WACI). Session Chair: Seth Copen Goldstein. (Carnegie Mellon University)
- Short presentations of your best and WACIest ideas.
7:30- 9:30.
- Outing and Reception, Carnegie Mellon University. (Multiple chartered trolleys will make round trips between CMU and Sheraton continuously between 7pm and 10:00pm.)
Tuesday, March 16, 2010
9am-10:40am Session 5. Software Reliability
- SherLog: Error Diagnosis by Connecting Clues from Run-time Logs, Ding Yuan, Haohui Mai, Weiwei Xiong, Lin Tan, Yuanyuan Zhou and Shankar Pasupathy (University of California, San Diego; University of Illinois at Urbana-Champaign)
- Analyzing Multicore Dumps to Facilitate Concurrency Bug Reproduction, Dasarath Weeratunge, Xiangyu Zhang and Suresh Jagannathan (Purdue University)
- A Randomized Scheduler with Probabilistic Guarantees of Finding Bugs, Sebastian Burckhardt, Pravesh Kothari, Madanlal Musuvathi and Santosh Nagarakatte (Microsoft Research)
- ConMem: Detecting Severe Concurrency Bugs Through an Effect-Oriented Approach, Wei Zhang, Chong Sun and Shan Lu (University of Wisconsin- Madison)
10:40-11:10 Morning Break
11:10-12:25. Session 6. Hardware Power and Energy
- Characterizing Processor Thermal Behavior, Francisco J. Mesa-MartÃnez, Ehsan K. Ardestani and Jose Renau (University of California, Santa Cruz)
- Conservation Cores: Reducing the Energy of Mature Computations, Ganesh Venkatesh, John Sampson, Nathan Goulding, Saturnino Garcia, Vladyslav Bryksin, Jose Lugo-Martinez, Steve Swanson and Michael Taylor, (University of California, San Diego)
- Micro-Pages: Increasing DRAM Efficiency with Locality-Aware Data Placement, Kshitij Sudan, Niladrish Chatterjee, David Nellans, Manu Awasthi, Rajeev Balasubramonian and Al Davis, (University of Utah)
12:25-1:55 Lunch.
1:55-2:45. Session 7. Data Centers
- Power Routing: Dynamic Power Provisioning in the Data Center, Steven Pelley, David Meisner, Pooya Zandevakili, Jack Underwood and Thomas Wenisch, (University of Michigan)
- Joint Optimization of Idle and Cooling Power in Data Centers While Maintaining Response Time, Faraz Ahmad and T. N. Vijaykumar (Purdue University)
2:45-3:35. Session 8. Hardware Monitoring
- Butterfly Analysis: Adapting Dataflow Analysis to Dynamic Parallel Monitoring, Michelle Goodstein, Evangelos Vlachos, Shimin Chen, Phillip Gibbons, Michael Kozuch and Todd Mowry, (Carnegie Mellon University)
- ParaLog: Enabling and Accelerating Online Parallel Monitoring of Multithreaded Applications, Evangelos Vlachos, Michelle Goodstein, Michael Kozuch, Shimin Chen, Babak Falsafi, Phillip Gibbons and Todd Mowry, (Ecole Polytechnique Federale de Lausanne; Carnegie Mellon University)
3:35-4:05. Break.
4:05-5:20. Session 9. Parallel Programming 2
- MacroSS: Macro-SIMDization of Streaming Applications, Amir Hormati, Yoonseo Choi, Mark Woh, Manjunath Kudlur, Rodric Rabbah, Trevor Mudge and Scott Mahlke (University of Michigan)
- COMPASS: A Programmable Data Prefetcher Using Idle GPU Shaders, Dong Hyuk Woo and Hsien-Hsin Lee (Georgia Institute of Technology)
- Flexible Architectural Support for Fine-grain Scheduling, Daniel Sanchez, Richard Yoo and Christos Kozyrakis, (Stanford University)
Evening (Time TBA).
- Outing and Banquet, Heinz History Center. (Transportation Provided)
Wednesday, March 17, 2010
9am-10:40am Session 10. Parallel Memory Systems
- Specifying and Dynamically Verifying Address Translation-Aware Memory Consistency, Bogdan Romanescu, Alvin Lebeck and Daniel Sorin, (Duke University)
- Fairness via Source Throttling: A Configurable and High-Performance Fairness Substrate for Multi-Core Memory Systems, Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu and Yale Patt, (The University of Texas at Austin)
- An Asymmetric Distributed Shared Memory Model for Heterogeneous Parallel Systems, Isaac Gelado, Javier Cabezas, John Stone, Sanjay Patel, Nacho Navarro and Wen-mei Hwu (University of Illinois at Urbana- Champaign; UPC)
- Inter-Core Cooperative TLB Prefetchers for Chip Multiprocessors, Abhishek Bhattacharjee and Margaret Martonosi (Princeton University)
10:40-11:10 Break.
11:10-12:25. Session 11. Security and Hardware Reliability
- Orthrus: Efficient Software Integrity Protection on Multi-Cores, Ruirui Huang, Dan Deng and G. Edward Suh (Cornell University)
- Shoestring: Probabilistic Soft-error Resilience on the Cheap, Shuguang Feng, Shantanu Gupta, Amin Ansari and Scott Mahlke (University of Michigan)
- Virtualized and Flexible ECC for Main Memory, Doe Hyun Yoon and Mattan Erez, (The university of Texas at Austin)