Fifteenth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2010)
Sheraton Station Square
Pittsburgh, PA - March 13~17, 2010

Tutorial: Performance Monitoring using Hardware Performance Events

Full Day Tutorial

Saturday, March 13

Organizers: Ramesh V Peri (, Peggy Irelan (Intel), David Levinthal (Intel)

Description: Modern microprocessors provide facilities to monitor a large number of events in the hardware with very little intervention from the user and with minimal overhead. This information can be used for a variety of purposes - a primary use has been in understanding and improving the performance of applications that run on these processors. In this tutorial we will give an overview and describe the capabilities of the performance monitoring unit present on modern x86 processors, methodologies for tuning performance of applications using the information provided by various events in the PMU and performance tools that are used for collecting and analyzing the PMU event data. We will primarily focus on Intel® tools like VTune®, Performance Tuning Utility and the PMU of Intel®’s latest generation core i7® processor – the tuning principles here will be applicable for other processors and tools also. We will provide examples and hands on exercises to explain how to access performance monitoring events in the applications so that users can develop custom tools. We will also share some case studies on improving the performance of applications using these tools.