Codes/CASHE 96 Workshop Program
Overview
The workshop puts emphasis on discussions and open sessions rather
than on conference-style presentations. The 18 selected papers are
presented in 5 paper sessions which start with a 10 minute oral
introduction of each paper followed by a poster discussion of all
papers of a session.
The proposed topics of the parallel group discussions are announced
on the workshop web page together with a short introduction by the
moderators. This gives everybody the opportunity to prepare for the
discussions. We can still add topics. Just send an email to the program
chair together with a short statement on the motivation and an outline
on what should be discussed. The proposers will be asked to moderate
the sessions. The results of the group discussions will be summarized
in the workshop web page.
Two complementary session forms allow every workshop participant
to present recent work or ideas. All participants can bring a poster to the
open poster session. After the workshop, we will list the titles of the
posters in the workshop web page and set a pointer to the authors. The
"rump" session at the end of the workshop is a plenary session divided
in 5 minute slots which are assigned to anybody who wants to make a
short statement on any co-design related topic which people should
take home to think about, possibly some problems or new aspects
which came up during the workshop or just reflections on workshop
contents. If there is enough material we could include a summary of
the session in the web page.
Schedule
Sunday, March 17:
18:00 - 19:00 Registration
19:00 - 21:00 Reception
Monday, March 18:
8:00 - 9:00 Registration and Continental Breakfast
9:00 - 9:15 Welcome and Opening
9:15 - 10:30 Paper Session 1: Transformation Based Co-Design
and Communication Synthesis
"Embedded Architecture Co-Synthesis and System Integration"
Steven Vercauteren, Bill Lin, Hugo De Man, IMEC, Leuven, Belgium
"A Multi-Level Transformation Approach to HW/SW Codesign: A Case Study"
Tommy King-Yin Cheung, Graham R. Hellestrand, Prasert Kanthamanon,
VLSI and Systems Technology Laboratory, School of Computer Science and
Engineering, University of New South Wales, Australia
"Fully Parallel Hardware/Software Codesign for Multi-Dimensional DSP
Applications"
Michael Sheliga, Nelson Luiz Passos, Edwin Hsing- Mean Sha,
Department of Computer Science and Engineering, University of Notre Dame
10:30 - 10:45 Coffee break
10:45 - 12:15 Paper Session 2: Estimation Techniques
"A Co-Design Methodology Based on the Specification Language LOTOS"
C. Carreras, J.C. Lspez, M.L. Lspez, C. Delgado-Kloos, N. Martmnez, L. Sanchez
Universidad Politicnica de Madrid, Spain
"Speed-Up Estimation for HW/SW-Systems"
Wolfram Hardt, University of Paderborn, Germany;
Wolfgang Rosenstiel, University of Tubingen, Germany
"A Framework for Interactive Timing Constraint Analysis of Embedded Systems"
Rajesh K. Gupta, Department of Computer Science,
University of Illinois at Urbana-Champaign
"The Interplay of Run-Time Estimation and Granularity in HW/SW Partitioning"
Jorg Henkel, Rolf Ernst, Technische Universitat
Braunschweig, Germany
12:15 - 13:30 Lunch
13:30 - 15:30 Panel on the RASSP-Program
Organizer: Anthony J. Gadient,
Advanced Technology Group, SCRA, Charleston
15:30 - 15:45 Coffee Break
15:45 - 17:30 Invited Talk:
"Establishing and Maintaining Performance Baselines for HW/SW Systems,"
Jay Strosnider
Electrical & Computer Engineering Dept., Carnegie Mellon University, USA
Dinner on your own.
Tuesday, March 19
8:00 - 9:00 Continental Breakfast
9:00 - 10:30 Paper session 3: Partitioning and Clustering
"Partitioning and Exploration Stategies in the TOSCA Co-Design Flow"
A. Balboni, ITLTEL_SIT, Castelletto di Settimo, Italy
W. Fornaciari, CEFRIEL and Politecnico di Milano, Italy
D. Sciuto, Politecnico di Milano, Italy
"Process Partitioning for Distributed Embedded Systems"
Junwei Hou, Wayne H. Wolf
Department of Electrical Engineering, Princeton University
"Two-level Partitioning of Image Processing Algorithms for the Parallel
Map-oriented Machine"
Reiner W. Hartenstein, Jorgen Becker, Rainer Kress
University of Kaiserslautern, Germany
"PACE: A Dynamic Programming Algorithm for Hardware/Software Partitioning"
Peter Voigt Knudsen, Jan Madsen
Department of Computer Science, Technical University of Denmark, Lyngby
10:30 - 10:45 Coffee break
10:45 - 12:00 Paper session 4: Case studies
"A Model for the Coanalysis of Hardware and Software Architectures"
Fred Rose, Todd Carpenter, John Shackleton, Todd Steeves,
Honeywell Technology Center, Minneapolis
"A Case Study in Codesign of Communication Controllers - A User Driven
Approach" R. Gerndt,
Institute for Applied Micoelectronics, Braunschweig, Germany
"Formal Verification of Embedded Systems Based on CFSM Networks"
Felice Balarin, Cadence Berkeley Laboratories, USA;
Luciano Lavagno, Politecnico di Torino, Italy;
Harry Hsieh, Alberto Sangiovanni-Vincentelli,
Department of Electrical Engineering and Computer Science, University of California at Berkeley;
Attila Jurecska, Magneti Marelli, Italy
12:00 - 13:15 Lunch
13:15 - 15:15 Group Discussions
Topic 1: Representation Issues in Co-Design
Moderator: Giovanni DeMicheli, Stanford University
Participants: Wayne Wolf, Graham Hellerstrand, bill Lin and Gaeano Borriello
Description: A group discussion will follow short position statements by panelists on the represenation formalism that are appropriate for hardware/software systems and support co-design tools.
Topic 2: The Role of Flexibility in Co-Design
Moderator: Rolf Ernst, University of Braunschweig, Germany
15:15 - 15:30 Coffee break
15:30 - 17:45 Open Poster Session
18:00 - 20:00 Workshop Dinner
20:00 Open discussion about workshop organization,
publication issues, benchmarks, etc.
Wednesday, March 20
8:00 - 9:00 Continental Breakfast
9:00 - 10:30 Paper session 5: Modeling and Simulation
"Towards a Model for Hardware and Software Functional Partitioning"
Frank Vahid, Thuy dm Le
Department of Computer Science, University of California at Riverside
"Implications of Codesign as a Natural Constituent of a Systems Engineering
Discipline for Computer Based Systems"
Markus Voss, Oliver Hammerschmidt, Universitdt Karlsruhe, Institut fur Mikrorechner und Automation, Germany
"Uninterpreted Co-Simulation for Performance Evaluation of Hw/Sw Systems"
J.P. Calvez, D. Heller, O. Pasquier
IRESTE, Nantes, France
"Fast and Accurate Hardware-Software Co-Simulation Using Software Timing Estimates",
Claudio Passerone, Luciano Lavagno, Wilsin Gosti, Alberto Sangiovanni-Vincentelli
Dept. of EE & CS, University of California at Berkeley
10:30 - 10:45 Coffee break
10:45 - 12:00 "Rump" session: 5 min. statements
12:00 End of workshop