Panel on the RASSP Program
Anthony Gadient
The Rapid Prototyping of Application Specific Signal Processors
(RASSP) Program is a major $150M ARPA/Tri-Service effort to improve by
4X the way embedded processors are specified, designed, fielded,
maintained and upgraded. A major underlying theme in the approach
being taken by the RASSP program is "Hardware/Software Co-Design." In
RASSP, Hardware/Software Co-Design refers to the simultaneous
consideration of hardware and software within a system design.
Hardware/Software Co-Design therefore is the co-development and
co-verification of hardware and software through the use of simulation
and/or emulation. Hardware/Software Co-Design is part of a RASSP
system design process which begins with Functional Design and ends
with Hardware Design and with Software Coding.
The RASSP program has a particular perspective on Hardware/Software
Co-Design. First, the emphasis of the RASSP program is on signal
processing systems which provides a very well defined application
domain for the system function. However, the level of application on
which RASSP systems are typically employed require relatively complex
algorithms, including both data flow aspects and control aspects.
Second, the target systems for RASSP applications are typically
heterogeneous multiprocessors with 10 to 100 processors, including
both ASIC processors and COTS Digital Signal Processors (DSPs).
In the RASSP methodology, Hardware/Software Co-Design involves three
distinct phases: Functional Design, Hardware/Software Partitioning,
and Hardware/Software Co-Development. Functional Design occurs in the
early stages of the process and involves the transformation of system
requirements, goals, and constraints into a functional architecture.
Functional Design involves both implementation independent and
implementation dependent phases. In RASSP, Hardware/Software
Co-Design effects the implementation dependent phase of this part of
the process. Hardware/Software Partitioning addresses the
transformation of the functional architecture into forms compatible
with physical implementation and the allocation of functions to
physical architectural components. During hardware and software
co-development, Hardware/Software Co-Design provides validation and
the potential for rapid revisiting of early design decisions in the
context of facts produced by detailed design.
Hardware/Software Co-Design has been used in RASSP to develop a
Synthetic Aperture Radar (SAR) system. In this design the system
requirements were provided in the form of an executable specification.
This executable specification provided most of the functional
architecture for the SAR System and provided the starting point for a
complete design of the SAR system which was performed using the RASSP
design tools and methodology.
We propose a group discussion that would present the
developments to date in RASSP in the area of Hardware/Software
Co-Design. These discussions would focus on three areas. First, the
tools developed by RASSP to support Hardware/Software Co-Design would
be presented. Second, the use of Hardware/Software Co-Design in the
RASSP methodology would be discussed. Lastly, RASSP experiences in
the application of Hardware/Software Co-Design to a significant
development effort would be presented. This discussion would provide
an industry perspective on the benefits of Hardware/Software Co-Design
and provide insight into potential future research directions that
might be undertaken to meet industrial requirements. The proposed
discussion would require approximately 2 hours and would involve the
following individuals:
Dr. Cory Meyers, Sanders
Mr. Jeff Pridmore, Lockheed Martin Advanced Technology Laboratories
Dr. Larry Scanlon, Hughes
Mr. Fred Rose, Honeywell
Dr. Gregory Peterson, US Air Force
Mr. Arne Bard, US Army
For further information on the RASSP Program see the RASSP Home Page