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Table of Contents
Corflow
How Do I Get It?
Try Corflow Online
Write your control thread description below:
#include
ctrl_thread() { }
Write your user core logic below:
module top(CLK, RST_N); input CLK, RST_N; endmodule
Hardware Configuration:
Core Logic HDL:
Verilog 95
User Clock:
100MHz
Platform:
Xilinx ML605 Board
Convey HC-1
Xilinx XUPv5
BEE3 (Single-FPGA)
Email:
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downloads.1322449030.txt.gz
· Last modified: 2011/11/28 02:57 by
echung
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