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--- connect-hls [2016/12/12 22:12]
zzhao1 created
+++ connect-hls [2017/10/31 00:30] (current)
zzhao1
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-Coming Soon
+=====Using Vivado-HLS for Structural Design: a NoC Case Study=====
+There have been ample successful examples of applying Xilinx Vivado's "function-to-module" high-level synthesis (HLS) where the subject is algorithmic in nature.  In CONNECT-HLS project, we carried out a design study to assess the effectiveness of applying Vivado-HLS in structural design, where precise bit- and cycle- level control is a must. We succeeded in using Vivado-HLS to produce router and NoC modules that are exact cycle- and bit-accurate replacements of our reference [[http://users.ece.cmu.edu/~mpapamic/connect|CONNECT]] RTL-based router and NoC modules.  The routers and NoCs resulting from HLS and RTL are comparable in resource utilization and critical path delay.  Our experience subjectively suggests that HLS is able to
+simplify the design effort even though much of the structural details had to be provided in the HLS description through a combination of coding discipline and explicit pragmas.
+For more details, please see our technical report, poster and source code below. Please contact [[zzhao1@andrew.cmu.edu|Zhipeng Zhao at zzhao1@andrew.cmu.edu]]
+ for any questions or bug reports.
+<html>
+<font size=4><b>Technical Report and Poster</b></font>
+<hr>
+</html>
+**{{http://arxiv.org/abs/1710.10290|Using Vivado-HLS for Structural Design: a NoC Case Study}}**\\
+**{{http://www.ece.cmu.edu/~coram/connect-hls/Poster.pdf|Poster}}**\\
+\\
+<html>
+<font size=4><b>Source Code</b></font>
+<hr>
+</html>
+We provide the C++ source code for both illustrative examples in technical report and a fully parameterized router. The code is only intended for internal, non-commercial research use and released under {{http://www.ece.cmu.edu/~coram/connect-hls/LICENSE|MIT License}}.
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