Modern systems-on-chip use networks to enable scalable communication via packet switching as opposed to traditional global interconnect. As such, the network becomes a key concept for the continued success of embedded and high performance computing. Our group explores probabilistic and statistical physics approaches to understand the theoretical basis, essential properties, and design metrics relevant to different networks in embedded and high performance computing.
Power Management and Optimization of Multi-core Platforms
Another fundamental concern, in system-level design, is energy consumption. Areas of exploration include distributed and centralized control schemes for dynamic power management, multi-domain (voltage/frequency) designs, and power optimization methods to limit energy consumption while preserving performance.
Workload Modeling and Characterization of Multi-Core Systems
Creating the hardware for scalable multi-processor systems is only half the battle - knowing how to exploit their capabilities is an entirely different matter. Our group explores methods for efficiently programming and mapping applications to parallel platforms, as well as what the data demands of such applications can tell us about how to design better hardware and software.
Communication-Based Design of Multi-Core Systems: Analysis & Optimization
A quantum-leap over classical bus-based designs, Networks-on-Chip allow for scalable multi-processor platforms with hundreds, and soon thousands, of cores. We investigate the fundamental paradigm shift towards network-centric design, work to expose the fundamental mathematical approaches that define important classes of on-chip communication, and use such techniques to analyze and optimize various multi-processor designs.
Emerging On-Chip Communication Paradigms
With the emergence of Networks-on-Chip and similar-minded platforms, on-chip communication is now a paramount concern. Finding optimal network designs and routing algorithms is a key focus, and we explore topics such as stochastic communication, small world networks, dynamic reconfigurable networks, and fractal behavior/self-similarity.
Multicore design methodologies need to be complemented by efficient mechanisms for validating the NoC communication fabric and the functional cores. Prototyping can be used to improve the evaluation accuracy by bringing the multicore design closer to reality. Towards this end, we implement hardware and software prototypes that can allow a direct comparison against analytical and simulation-based approaches.
System-level Power/Performance Optimization
Continuous advancements in semiconductor technology enable the design of complex SoCs. At the same time, the applications that run on such platforms have become increasingly complex and have tight power and performance requirements. Our group explores rigorous system-level design methodologies that can ensure a satisfactory design quality via synergistic computation and communication refinement.