Application-Aware Memory Channel Partitioning

Wednesday Nov. 30, 2011
Hamerschlag Hall D-210
4:00 pm

Lavanya Subramanian (ECE, CMU)

Abstract

Main memory is a major shared resource among cores in a multicore system. If the interference between different applications’ memory requests is not controlled effectively, system performance can degrade significantly. Previous work aimed to mitigate the problem of interference between applications by changing the scheduling policy in the memory controller.

We first present an alternative approach to reducing inter-application interference in the memory system: application-aware memory channel partitioning (MCP). The idea is to map the data of applications that are likely to severely interfere with each other to different memory channels. Second, we observe that interference can be further reduced with a combination of memory channel partitioning and scheduling, which we call integrated memory partitioning and scheduling (IMPS). The key idea is to 1) always prioritize very light applications in the memory scheduler since such applications cause negligible interference to others, 2) use MCP to reduce interference among the remaining applications.

We evaluate MCP and IMPS on a variety of multiprogrammed workloads and system configurations and compare them to four previously proposed state-of-the-art memory scheduling policies. Averaged over 240 workloads on a 24-core system with 4 memory channels, MCP improves system throughput by 1% over the previous best scheduler, while avoiding modifications to existing memory schedulers. IMPS improves system throughput by 5% over the previous best scheduler, while incurring much lower hardware complexity than the latter.

Bio

Lavanya Subramanian is a PhD student in the ECE department of Carnegie Mellon University. She is advised by Prof. Onur Mutlu and works in the general area of Computer Architecture and specifically on main memory management in multicore systems. She completed her Bachelor’s degree in ECE at Madras Institute of Technology, India in 2007.


Back to the seminar page