AMD Sponsors ECE Course Contests

 Funds Awards for IC Design Project & Digital Systems Testing & Testable Design

December 19, 2007

ECE alumnus Spence Oliver (M.S. 2000), an implementation engineer with Advanced Micro Devices, Inc. (AMD) and Ari Shtulman, a design for testability engineer with AMD, visited campus from Austin, TX, to present awards to the winners of a final project course contest for Integrated Circuit (IC) Design Project. Shtulman also gave awards to the winners for Digital Systems Testing and Testable Design. AMD sponsors the annual competitions. The company provides microprocessor and graphics solutions. View project photos.

Pupils in IC Design Project, instructed by Andrzej Strojwas, Keithley Professor of ECE, showcased their projects for the course contest. ECE students Jared Dubin, Terry Garove, and Alexander Runas won the Best Design Award for their project, a digital menu which they called "Waitless." Jared also won an award for Most Valuable Designer, while Anna Kochalko, Hong Tuck Liew, Christopher Moody, and Jiake (John) Wu earned the Exceptional Design Award for Parking Pal, "Your digital parking meter of the future!"

The class mimicked a large design team environment in which individual designers must communicate their ideas precisely and efficiently, utilizing feedback provided by the design environment. They learned that optimum IC design must be achieved using a number of variables involving all levels of design abstraction, ranging between architecture choice and detail of the IC layout.

In Digital Systems Testing and Testable Design, taught by ECE Professor Shawn Blanton, students examined the theory and practice of fault analysis, test generation, and design for testability (DFT) for digital ICs and systems. Students integrate everything they have learned for the final assignment, modifying a standard benchmark digital circuit to make it "testable."

The first place winners for Best Design were Wing Chiu (Jason) Tam and Deepak Rangaraj. Their DFT project used various techniques, such as built-in self-testing (BIST), scan chain, and boundary scan, to make a given gate-level design 100 percent single stuck-line (SSL) testable with a minimal hardware/cycle cost. Anupama Suryanarayanan and David Levitt placed second for Exceptional Design, while Dmitriy Solomonov and Henry Teng ranked third for Excellent Design.

Each team presented their design and described their methods and results for their classmates and the judges: Shtulman, Blanton, and teaching assistant Osei Poku, an ECE Ph.D. candidate.

Hong Tuck Liew receives the Exceptional Design Award from ECE alumnus Spence Oliver, representing AMD. Christopher Moody, who won the award with Hong, was not present for the photo.

From left to right: Pictured are teaching assistant Osei Poku, ECE Professor Shawn Blanton, Best Design winner Wing Chiu (Jason) Tam, and Ari Shtulman from AMD. Deepak Rangaraj, who won the award with Jason, was not present for the photo.

Related People:

Ronald Blanton

Andrzej Strojwas

Related Links:

Digital Systems Testing and Testable Design

Integrated Circuit Design Project

ECE Graduate Students Awarded Trip to AMD Austin

Final Project Photo Gallery