February 2, 2004
For second year ECE graduate student Shelley Chen, compiling a busy schedule processes success in the form of a Semiconductor Research Corporation (SRC) Master's Scholarship. Often spotted researching compilers, multiprocessors, and ways to reduce simulation time, her award bridges academia and industry, much like Chen's experiences at school, Sun, and Motorola.
A resident of Freemont, California, Chen was selected from a nationwide contest of minorities and women for outstanding academic achievement and microelectronics research. ECE's strong computer architecture faculty drew her to Carnegie Mellon: "I applied to ECE because I wanted to do computer architecture. I found more professors in the ECE department that were working on things that I was interested in," she said. "I really liked working with the people in my office."
With her classmate, Jen Morris, also a first year ECE graduate student and the recipient of the 2003 NSF Graduate Research Fellowship, Chen worked to solve one of the central problems posed in 18-741, Babak Falsafi's Advanced Computer Architecture course: "Jen and Shelley explored a novel way of enhancing instruction-level parallelism and performance by identifying instruction sequences that are dependent on long-latency operations and removing them from the execution's critical path," reported Falsafi, Associate Professor of ECE and CS, and Chen's advisor. Their final paper, "Out-of-Order Memory Accesses Using a Load Wait Buffer," reviewed this research.
Chen is a member of the Computer Architecture Laboratory at Carnegie Mellon's (CALCM) Sampling Microarchitecture Simulation (SMARTS) project, which applies statistical sampling to a uniprocessor system to speed up simulation time. Motivated by her peers, she also finds the "Impetus" to succeed in the so-named CALCM research initiative to innovate advanced computer systems.
"Shelley has worked on a research project on one of the most complex (albeit, very timely) topics I suggested for the students taking the class," said Diana Marculescu, Assistant Professor of ECE, who instructed Chen in 18-743, Energy Aware Computing. Her project on the "Dynamic Speed/Voltage Scaling for GALS Processors," co-authored with ECE graduate student partner Anand Eswaran, "provided interesting comments and directions for future investigations," explained Marculescu.
Her other courses have included 18-742, Multiprocessor Computer Architecture, with Andreas Nowatzyk, Associate Professor of Robotics and ECE, and 15-745, Optimizing Compilers for Modern Architectures with Todd Mowry, Associate Professor of CS and ECE. She summarized her work on a compiler project, "Improving Performance through Data Object Fusion," with CS graduate student Nikos Hardavellas: "Our project was a compiler optimization that fused multiple nodes of a data structure into a larger data structure such that the keys of the nodes would all be co-located onto the same cache line. Thus, a single cache access would allow for the retrieval of multiple keys, reducing the time to traverse this noded data structure."
She earned her BA in Computer Science from the University of California at Berkeley. In the summer of her sophomore year, Chen worked for Sun Microsystems' run-time group in Cupertino, California, developing a tool to automate the building and testing of source code for the Java Virtual Machine (JVN). Interning for Motorola in Schaumburg, Illinois during her junior year break, she refined a timesaving messaging system on PDAs and pagers. The automatic service gives physicians and nurses more time for their patients.
Planning to go into industry in the future, Chen prepares by absorbing the latest CALCM technologies: "Over the school year they have weekly seminars; students present research work and practice for conferences, and outside faculty in the area come to speak. It's a way to keep up-to-date."