Ken Mai

Principal Systems Scientist – ECE
Department Electrical and Computer Engineering
Office 2121 Hamerschlag Hall
Telephone (412)-268-8335
Fax (412)-268-1374
Assistant Judy Bandola

Research Interests

With process technologies scaling into the nanometer regime, the underlying implementation technology increasingly affects architecture and circuit design. We must adapt and reinvent current designs to circumvent technology constraints (e.g. interconnect delay, device leakage, soft-errors, device mismatch) and to target emerging applications (e.g. sensor networks, computational biology). The key near-term challenge is to build compute systems that can efficiently achieve high-performance, yet remain economically feasible, general-purpose, and easy to program. In the long-term, with CMOS scaling approaching fundamental limits, the challenge will be to build efficient, high-performance, reliable computation systems from technology building blocks that may be radically different from those we use today.

My primary research interest is the circuit design of efficient, high-performance digital blocks (i.e. memories and functional units) in future generation technologies. Further, I'm interested in building tools to export VLSI-level design information and constraints to architectural-level design.

In the News

  • Student & Professor paper will appear at Best Paper Session at HPCA Conference
  • Ken Mai Awarded NSF/SRC Grant
  • Professor Mai Wins Best Paper Award at DATE Conference
  • ECE Students Display Final Projects
  • Mai and Higgs Win NSF CAREER Award
  •  Ken  Mai

    Carnegie Mellon, 2005

    Research Area



    Digital circuit design, computer architecture, memory design, reconfigurable computing


    PhD, 2005
    Electrical Engineering
    Stanford University

    MS, 1997
    Electrical Engineering
    Stanford University

    BS, 1993
    Electrical Engineering
    Stanford University