Babak Falsafi

Adjunct Professor – ECECS

Research Interests

Prof. Falsafi's research group, Impetus, focuses on the design, evaluation, and implementation of computer systems with emphasis on processor and memory architecture. Current projects include:

Spatio-Temporal Memory Streaming (STEMS)

While memory capacity in recent years has increased commensurately with processor speeds, memory speeds have primarily lagged behind. The brute-force approach of building a hierarchy of storage elements — i.e., caches — trading off size for speed at every level has reached diminishing returns. A STEMS system extracts repetitive spatially- and temporally-correlated streams of instruction/data corresponding to computational fragments, and speculatively moves them among processors prior to use and away upon completion of reuse to bridge the processor/memory performance gap.

Architectural Support for Gigascale Integration

The continued scaling of CMOS processes and circuits will result in unprecedented low levels of chip reliability due to a number of error sources including but not limited to transient (soft) error — resulting from shrinking devices and increased vulnerability to cosmic radiation, gradual error — due to the increase in device performance variability, and wear-out error — due to degradation of devices over time. We are exploring the design space for architectural support to detect and recover from error in future gigascale CMOS designs in both single-chip and scalable computer systems.

Fast, accurate and flexible full-system simulation

Computer architects have long relied on software simulation to measure dynamic performance metrics (e.g. CPI) of a proposed design. Unfortunately, with the ever-growing size and complexity of modern hardware platforms, detailed software simulators have become prohibitively (e.g., > 1000000x) slower than their hardware counterparts. We are exploring simulation methodologies and frameworks for fast, yet accurate and flexible full-system simulation of large-scale computer systems. Our frameworks rely on statistical sampling to provide accuracy and speed, and componentization to provide flexibility.

In the News

  • CALCM, Intel Pittsburgh Paper to Appear in <cite>IEEE Micro</cite>
  • TRUSS Paper Published in Special Issue of *IEEE Micro*
  • Carnegie Mellon Research Team Releases Computer Architecture Simulation Infrastructure
  • Falsafi Wins 2004 IBM Faculty Award
  • Falsafi Awarded Sloan Research Fellowship; Joins Group of Nobel Prize Acclaim
  • Falsafi and Mowry Win 2003 IBM Faculty Partnership Awards
  • 2 ECE Graduate Students Win SRC Awards
  • Falsafi Speaks at Top Gun Distinguished Lecture Series
  • Falsafi Wins IBM Faculty Partnership Award
  •  Babak  Falsafi

    Carnegie Mellon, 2001

    Research Area

    Computer Systems


    Computer architecture, memory systems, multiprocessor architecture, architectural support for gigascale integration, design evaluation tools


    PhD, 1998
    Computer Science
    University of Wisconsin, Madison

    MS, 1992
    Computer Science
    University of Wisconsin, Madison

    BS, 1990
    Computer Science
    SUNY at Buffalo

    BS, 1990
    Electrical and Computer Engineering
    SUNY at Buffalo