Runnemede: An Architecture for Ubiquitous High-Performance Computing

Nicholas P. Carter (Intel)

Wednesday 3/4, 4:00-5:00pm
CIC Panther Hollow


Runnemede is a research architecture developed as part of DARPA's Ubiquitous High-Performance Computing (UHPC) program that was designed to explore the upper limits of energy efficiency without the constraints imposed by backward compatibility and the need to support conventional programming models. It was developed through a co-design process that considered the hardware, the runtime/OS, and applications simultaneously. Near-threshold voltage operation, fine-grained power and clock management, and separate execution units for runtime and application code are used to reduce energy consumption. Memory energy is minimized through application-managed on-chip memory and direct physical addressing. A hierarchical on-chip network reduces communication energy, and a codelet-based execution model supports extreme parallelism and fine-grained tasks.

This talk outlines the Runnemede architecture and illustrates how the architecture, runtime, and applications influenced each other. We show how our co-design process reduced energy consumption on a synthetic aperture radar application by 75%, and how our software-managed memory hierarchy reduced memory energy by 50-75% on two benchmarks.


Nick Carter is a Research Scientist in Intel Labs' Accelerator Architecture Lab, where he develops runtimes and programming techniques for accelerator-based architectures. From 2010-2012, he was a member of Intel's Ubiquitous High-Performance Computing project, working on memory systems for energy-efficient architectures. Prior to joining Intel in 2007, Nick was an Assistant Professor at the University of Illinois at Urbana-Champaign. He received his B.S., M.S., and Ph.D. degrees from M.I.T.