- Journals

• C.-L. Chou, U. Y. Ogras, R. Marculescu,' Energy- and Performance-aware Incremental Mapping for Networks-on-Chip with Multiple Voltage Levels ', in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 27, no. 10, pp. 1866-1879, Oct. 2008.
• P. Bogdan, T. Dumitras, R. Marculescu, ' Stochastic Communication: A New Paradigm for Fault-Tolerant Networks-on-Chip ', in Hindawi VLSI Design, Special Issue on Networks-on-Chip, Feb. 2007.
• U. Y. Ogras, R. Marculescu, ' "It's a small world after all";: NoC Performance Optimization via Long-range Link Insertion, ' in IEEE Trans. on Very Large Scale Integration Systems, Special Section on Hardware/Software Codesign and System Synthesis, Vol.14, No.7, July 2006.

- Conference Papers

• SJ Hollis, C Jackson, P Bogdan, R Marculescu, "Exploiting emergence in on-chip interconnects," in IEEE Transactions on Computers, 63 (3), 570-582, March 2014.
• C.-L. Chou, R. Marculescu,' Designing Heterogeneous Embedded Network-on-Chip Platforms With Users in Mind ', in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 29, Issues. 9, pp. 1301 - 1314, Sep. 2010.
• C.-L. Chou, R. Marculescu,' Run-Time Task Allocation Considering User Behavior in Embedded Multiprocessor Networks-on-Chip ', in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 29, no. 1, pp. 78-91, Jan. 2010.
• C.-L. Chou, R. Marculescu, ' User-Centric Design Space Exploration for Heterogeneous Network-on-Chip Platforms', in Proc. Design, Automation and Test in Europe Conf., Nice, France, April 2009.
• C.-L. Chou, R. Marculescu, ' User-Aware Dynamic Task Allocation in Networks-on-Chip ', in Proc. Design, Automation and Test in Europe Conf., Munich, Germany, March 2008.
• C.-L. Chou, R. Marculescu, ' Incremental Run-time Application Mapping for Homogeneous NoCs with Multiple Voltage Levels ', in Proc. CODES+ISSS, Salzburg, Austria, Oct. 2007.
• U. Y. Ogras, R. Marculescu, ' "It's a small world after all": NoC Performance Optimization via Long-range Link Insertion, ' in IEEE Trans. on Very Large Scale Integration Systems, Special Section on Hardware/Software Codesign and System Synthesis, Vol.14, No.7, July 2006.
• R. Marculescu, J. Rabaey, A. Sangiovanni-Vincentelli, ' Is "Network" The Next "Big Idea" In Design?', in Proc. Design, Automation and Test in Europe Conf., Munich, Germany, March 2006. (Hot Topic "Is "Network" The Next "Big Idea" In Design? Network Paradigms in Systems, Sensors, & Silicon")
• T. Dumitras, S. Kerner, R. Marculescu, 'Enabling On-Chip Diversity Through Architectural Communication Design', in Proc. ASP-DAC, Yokohama, Japan, Jan. 2004.