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Call for Papers
Fifth ACM/IEEE International Symposium on Networks-on-Chip
May 1-4, 2011
Pittsburgh, Pennsylvania, USA
Conference Web Site: http://www.nocsymposium.org
The International Symposium on Networks-on-Chip (NOCS) is the premier event dedicated to interdisciplinary research on on-chip and in-package communication technology, architecture, design methods and applications. NOCS aims at bringing together scientists and engineers working on NoC innovations from inter-related research communities, including computer architecture, networking, circuits and systems, embedded systems, and design automation.
Original papers describing new and previously unpublished results are solicited on all aspects of NoC technology. Topics of interest include, but are not limited to:
| Network architecture (topology, routing, arbitration) | NoC design methodologies and tools |
| Network design for 3D stacked logic and memory | NoC Quality of Service |
| Mapping of applications onto NoCs | NoCs for FPGAs and structured ASICs |
| Power and energy issues | NoC support for CMP/MPSoCs |
| Timing, synchronous/asynchronous communication | Novel interconnect links/switches/routers |
| NoC reliability issues | Optical & RF for on-chip/in-package interconnects |
| OS support for NoCs and programming models | Signaling and circuit design for NoC links |
| Workload characterization & evaluation | Physical design of interconnect and NoC |
| Network interface issues | Verification, debug & test of NoCs |
| Modeling, simulation, and synthesis of NoCs | Metrics and benchmarks for NoCs |
| NoC support for memory and cache access | NoC case studies, application-specific NoC design |
Electronic paper submission requires a full paper, up to 8 double-column IEEE format pages, including figures and references. Papers will be evaluated by the program committee in a blind review process based on scientific merit, innovation, relevance, and presentation. Proposals for tutorials, special sessions, panels are also invited. Detailed instructions for paper, tutorial, special sessions, and panel proposals are available separately.
A special section related to the conference will be organized in collaboration with one of the IEEE journals.
Important Dates
| Abstract registration deadline | Dec 10, 2010 (hard deadline, 11:59pm PST or GMT-8) | |
| Full paper submission deadline | Dec 17, 2010 (hard deadline, 11:59pm PST or GMT-8) | |
| Proposals for tutorials, special sessions and panels | Jan 14, 2011 | |
| Notification of acceptance | Feb 18, 2011 | |
| Final version due | Mar 20, 2011 |
Organizing Committee
General Chairs: Radu Marculescu (Carnegie Mellon Univ.) and Michael Kishinevsky (Intel Corp.)
Technical Program Committee Chairs: Ran Ginosar (Technion) and Karam S. Chatha (Arizona State Univ.)
Local Arrangements Chair: Don Thomas (Carnegie Mellon Univ.)
Finance Chair: Diana Marculescu (Carnegie Mellon Univ.)
Registration Chair: Jun Yang (Univ. of Pittsburgh)
Publicity Chair: Maurizio Palesi (Univ. of Catania)
Tutorials Chairs: Robert Mullins (Univ. of Cambridge) and Pascal Vivet (CEA-LETI)
Special Session Chairs: Sri Parameswaran (Univ. of New South Wales) and Partha Pande (Washington State Univ.)
Industrial Chairs: Ümit Ogras (Intel) and Fabien Clermidy (CEA-LETI)
Publications Chair: Luca Carloni (Columbia Univ.)
Poster and Demo Chair: Simon Hollis (Univ. of Bristol)
Contact Information
| Radu Marculescu | http://www.ece.cmu.edu/~sld/ | radum[at]ece.cmu.edu |
| Michael Kishinevsky | michael.kishinevsky[at]intel.com | |
| Ran Ginosar | http://webee.technion.ac.il/~ran/ | ran[at]ee.technion.ac.il |
| Karam Chatha | http://www.eas.asu.edu/~kchatha/ | karamvir.chatha[at]asu.edu |
