The ever-increasing levels of on-chip integration in the recent decade
have enabled phenomenal increases in computer system
performance. Unfortunately, the performance improvement has been also
accompanied by an increase in a chip's power and energy
dissipation. Higher power and energy dissipation require more
expensive packaging and cooling technology, increase cost, decrease
product reliability in all segments of computing market, and
significantly reduce battery life in portable systems.
The motivation behind the workshop is to provide a forum to present issues related to power dissipation and energy consumption to the architecture community. In particular, we will discuss power and power-related issues in computer system design, to help understand and overcome the limitations of existing hardware/software solutions for power reduction. Furthermore, we will also present a forum for examining innovative solutions to the power problem for computer systems at all levels of performance.