CMU MEMS Laboratory Publication Abstract


in Technical Digest of the 11th International Conference on Solid-State Sensors and Actuators (TRANSDUCERS), pp. 280-283, June 10-14, 2001, Munich, Germany.
Layout Extraction for Integrated Electronics and MEMS Devices
B. Baidya and T. Mukherjee
Lumped parameter simulators are increasingly being used for schematic-based MEMS design. However, as layout continues to be the design representation of choice for MEMS manufacturing, layout verification is crucial. Schematic-based simulation tools can be used for this verification through the extraction of the schematic from the layout representation. Furthermore, integrated MEMS needs combined extraction and simulation of conventional electronics and electromechanical components in order to correctly capture the interaction between these components. This paper introduces the concept of mechanical parasitics, which, when combined with electrical parasitics, enables the accurate verification of integrated electronics and MEMS devices.
© 2001 Springer-Verlag. All rights reserved.
Full paper not available from outside CMU

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