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Spiral inductors fabricated in a 0.18µm 6-level Cu interconnect low-K dielectric process suspended 100µm above the substrate with sidewall oxide removed are described. A maskless post-CMOS micromachining process has been developed for the low-K dielectric copper interconnect process. Post-CMOS process enhancements of inductors provide higher quality factors and self-resonant frequencies by undercutting silicon to eliminate substrate losses and etching inter-turn dielectrics to reduce self-capacitance. The micromachined inductors have significantly greater quality factor at higher frequencies extending the operational frequency range. Quality factors of greater than 7 were obtained at 5.5 GHz for inductors with silicon undercut and inter-turn oxide removed, while Q was 5.5 at 2.5 GHz for inductors having only their inter-turn oxide removed.
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