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In this paper, we present a technique to analyze variation of structural curl with temperature due to residual stress gradients in multilayer CMOS microstructures. Analytic equations verified by finite element analysis (FEA) and experiment are used as a basis for a FEA technique to predict residual stress dependent curl in an arbitrary device. A parameter extraction method based on measurement of tip deflection with temperature is proposed to extract the simulation parameters. Simple beam test structures composed of all metal-dielectric combinations possible in the Hewlett Packard 3-metal 0.5 µm n-well CMOS process are experimentally characterized. This information is used to obtain the characteristic temperature at which the beam has no vertical displacement and the stresses in each layer is zero. The thermal coefficient of expansion (TCE) for each layer is extracted using the rate of change of tip deflection with temperature. The characteristic temperature and TCE are inserted in FEA for prediction of structural curl with temperature. This predictive technique has been demonstrated for a curl-matched CMOS accelerometer.
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