CMU MEMS Laboratory Publication Abstract

 

in IEEE Journal of Solid-State Circuits, Volume 37, Issue 3, pp. 394-403, March 2002.
Micromachined High-Q Inductors in 0.18 µm Cu Interconnect Low-K CMOS
H. Lakdawala, X. Zhu, H. Luo, S. Santhanam, R. Carley and G. Fedder
ABSTRACT:
On-chip spiral micromachined inductors fabricated in a 0.18 µm digital CMOS process with 6-level copper interconnect and low-K dielectric are described. A post-CMOS maskless micromachining process compatible with the CMOS materials and design rules has been developed to create inductors suspended above the substrate with the inter-turn dielectric removed. Such inductors have higher quality factors as substrate losses are eliminated by silicon removal and increased self-resonant frequency due to reduction of inter-turn and substrate parasitic capacitances. Quality factors up to 12 were obtained for a 3.2-nH micromachined inductor at 7.5 GHz. Improvements of up to 180% in maximum quality factor, along with 40%-70% increase in self-resonant frequency were seen over conventional inductors. The effects of micromachining on inductor performance was modeled using a physics-based model with predictive capability. The model was verified by measurements at various stages of the post-CMOS processing. Micromachined inductor quality factor is limited by series resistance up to a predicted metal thickness of between 6-10 µm.
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