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The potential use of CMOS-MEMS downconversion mixer-filters in future reconfigurable integrated radios is demonstrated. Analytical and simulation models have been developed to enable mixer-filter design. An array of cantilever mixer-filters is designed and fabricated. The tested mixer-filter has a center frequency of 1.05 MHz, bandwidth of 1.3 kHz and a conversion-insertion loss of 72 dB, which are in good agreement with the analytical and simulated results. The simulated noise figure is 85 dB while the IIP3 voltage is calculated as 88 dBV. The design space has been explored showing that the loss can be reduced below 10 dB with the use of 0.2 μm gaps and <30 fF load capacitance. However, the noise figure with values higher than 50 dB seems to be a major concern. The mixer-filter naturally exhibits IM2 distortion, which may be rejected using differential LO topologies, and has a superior IM3 performance.
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