In the area of sensing circuit design, we introduce a circuit noise model that is validated by experiments and provides insights on design trade-offs. We apply a set of circuit techniques to minimize the circuit noise and suppress other nonidealities, including: a low noise architecture based on chopper stabilized continuous-time voltage sensing; inputreferred noise minimization based on capacitance matching at the sensor/circuit interface; a robust sensing node biasing scheme using periodic reset for charging suppression; and offset cancellation using differential difference amplifier. An integrated CMOS MEMS accelerometer prototype using these techniques achieves 50 μg/rtHz noise floor which is close to the Brownian noise floor, and > 40 dB of sensor offset reduction.

At the system level, force-balanced electromechanical delta-sigma modulation with high-Q micromechanical transducer is investigated to reduce Brownian noise and quantization noise altogether. A single loop architecture is introduced along with the switchedcapacitor circuit implementation of the loop filter. A digital force feedback scheme called complementary pulse density modulation (CPDM) is proposed to realize highly linear offset- insensitive feedback using nonlinear actuators. Simulations show such systems realize high-resolution A/D conversion with 100 dB dynamic range and μg/rtHz quantization plus Brownian noise floor while simultaneously provide robust control to the high-Q micro structure to obtain near optimum closed-loop settling and less than 2 Angstrom proofmass position error.