CMU MEMS Laboratory Publication Abstract


in Proceedings of the 22nd IEEE VLSI Test Symposium (VTS), pp. 139-147, April 25-29, 2004, Napa, CA.
Multi-modal built-in self-test for symmetric microsystems
N. Deb and S. Blanton
A mathematical model analyzing the efficacy of a built-in self-test technique, applicable to any symmetrical MEMS microstructure, is developed. The model predicts that the BIST technique can also be used to characterize a wide range of local manufacturing variations affecting different regions of the device. Model predictions have been validated by simulation. Specifically, it has been shown that by using a suitable modulation scheme, sensitivity to linear etch variation along a particular direction is improved by nearly 30%.
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