Cadence-based System-level Lab-on-a-Chip Simulator
     
    This page describes the Cadence-based platform to enter a Lab-on-a-Chip design schematic and to simulate using the models developed in our research.
     
   

Serpentine Design Demonstration
     
    This module provides documentation on the setup, design and simulation of a basic injector-separation channel model design. It will guide you through the steps involved in the process of building and simulating a serpentine channel and enable you to develop a better understanding of what components are involved and how they interact with one another.

Prerequisites

  • Access to a Unix based system is mandatory
    • Cadence environment used in this demo requires a Unix based machine

  • This demo assumes Cadence IC 5.0.33 is configured on the user’s account

  • Steps to configure Cadence can be found by clicking on any one of the links on University Cadence installations

Files to download

  • Download the file SYNBIOSYS_Cadence.tar.gz to your work directory
    • SYNBIOSYS_Cadence.tar.gz contains the model libraries for the simulator

Getting Started

Suggested Demo Outline

  • First, open the canned completed design of the serpentine channel demo to better understand the overall system, as detailed in Complete Serpentine Design
  • Second, step through the design entry of the serpentine channel design to understand how to construct a new design, and how to change the design parameters as detailed in Design Entry and Simulation
   
This research is funded in part by an National Science Foundation ITR grant CCR-0325344 and by Defense Advanced Research Projects Agency (DARPA) cooperative agreement F30602-01-2-0587.