FPGA Prototyping and Emulation of Computer Systems
From James Hoe
This research explores the application of Field Programmable Gate Arrays (FPGA) and High-level Hardware Synthesis technologies in computer systems prototyping and emulation. The goal of ProtoFlex FPGA-accelerated hybrid simulation is to extend the capability of SimFlex multiprocessor simulation to hundreds to thousands of nodes. My students and I are members of the multi-university RAMP project.
- A Complexity-Effective Architecture for Accelerating Full-System Multiprocessor Simulations Using FPGAs. Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Babak Falsafi and Ken Mai. International Symposium on Field Programmable Gate Arrays (FPGA), February 2008. (pdf)
- RAMP: A Research Accelerator for Multiple Processors. John Wawrzynek, David A. Patterson, Mark Oskin, Shih-Lien Lu, Christoforos Kozyrakis, James C. Hoe, Derek Chiou, Krste Asanovic. IEEE Micro, Volume 27, Number 2 , March/April 2007. (pdf)
- RAMP: Research Accelerator for Multiple Processors - A Community Vision for a Shared Experimental Parallel HW/SW Platform. Arvind, Krste Asanovic, Derek Chiou, James C. Hoe, Christoforos Kozyrakis, Shih-Lien Lu, Mark Oskin, David Patterson, Jan Rabaey, John Wawrzynek. September 2005. (pdf) (Tech report version of original 2005 NSF proposal.)
- In-System FPGA Prototyping of an Itanium Microarchitecture. Roland Wunderlich and James C. Hoe. International Conference on Computer Design (ICCD), October 2004. (pdf)
- High-Level Modeling and FPGA Prototyping of Microprocessors. Joydeep Ray and James C. Hoe. International Symposium on Field Programmable Gate Arrays (FPGA), February 2003. (pdf)
