Digital Signal Processing Hardware

From James Hoe

This research develops a domain-specific hardware synthesis framework for digital signal processing (DSP) computations. By incorporating domain-specific knowledge of mathematics and algebra into a synthesis tool, the proposed framework can manipulate a math-level transform description to optimize a DSP transform implementation at the algorithmic and architectural design level. This research is a part of the SPIRAL project. This research is in part supported by NSF through an ITR Award and by DARPA through the DESA program.

• Formal Datapath Representation and Manipulation for Implementing DSP Transforms. Peter A. Milder, Franz Franchetti, James C. Hoe, Markus Pueschel. Design Automation Conference (DAC), June 2008. (pdf)

• Multiplexed Multiple Constant Multiplication. Peter Tummeltshammer, James C. Hoe, and Markus Pueschel. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Volume 26, Number 9, September 2007. (pdf)

• Generating FPGA-Accelerated DFT Libraries. Paolo D'Alberto, Franz Franchetti, Peter A. Milder, Aliaksei Sandryhaila, James C. Hoe, Jeremy Johnson, Jose M. F. Moura and Markus Pueschel. IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM), April 2007. (pdf)

• Discrete Fourier Transform Compiler: From Mathematical Representation to Efficient Hardware. Peter A. Milder, Franz Franchetti, James C. Hoe, and Markus Pueschel. CSSI Technical Report, No. CSSI 07-01, January 2007. (pdf)

• Spiral: Joint Runtime and Energy Optimization of Linear Transforms. Marek Telgarsky, James C. Hoe, and Jose Moura. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), May 2006. (pdf)

• Fast and Accurate Resource Estimation of Automatically Generated Custom DFT IP Cores. Peter Milder, Mohammad Ahmad, James C. Hoe, and Markus Pueschel. International Symposium on Field Programmable Gate Arrays (FPGA), February 2006. [(pdf and try out the tool dftgen)

• Automatic Generation of Customized Discrete Fourier Transform IPs. Grace Nordin, Peter Milder, James C. Hoe, and Markus Pueschel. Design Automation Conference (DAC), June 2005. (pdf and try out the tool dftgen)

• Custom Optimized Multiplierless Implementations of DSP Algorithms. Markus Pueschel, Adam Zelinski, and James C. Hoe. International Conference on Computer Aided Design (ICCAD), November 2004. (pdf)

• Multiple Constant Multiplication by Time Multiplexed Mapping of Addition Chains. Peter Tummeltshammer, James C. Hoe, and Markus Pueschel. Design Automation Conference (DAC), June 2004. (pdf)

• Automatic Cost Minimization for Multiplierless Implementations of Discrete Signal Transforms. Adam Zelinski, Markus Pueschel, Smarahara Misra, and James C. Hoe. International Conference on Acoustics, Speech, and Signal Processing (ICASSP), May 2004. (pdf)