Herman Schmit's Publications

D. E. Thomas, J. K. Adams, and H. Schmit, "A model and methodology for hardware-software codesign," IEEE Design and Test of Computers, vol. 10, pp. 6–15, September 1993. IEEE Link

H. Schmit, L. Anstein, B. Lagnese, and D. E. Thomas, "Behavioral synthesis for FPGA-based computing," in FPGAs for Custom Computing Machines, 1994. Proceedings. IEEE Workshop on, pp. 125–132, 1994. IEEE Link

H. Schmit and D. E. Thomas, "Hidden markov modeling and fuzzy controllers in FPGAs," in FPGAs for Custom Computing Machines, 1995. Proceedings. IEEE Symposium on, pp. 214–221, 1995. IEEE Link Local Link

H. Schmit and D. E. Thomas, "Address generation for memories containing multiple arrays," in Proceedings of the 1995 IEEE/ACM International Conference on Computer-aided Design, pp. 510–514, IEEE Computer Society Press, 1995. IEEE Link

H. Schmit and D. E. Thomas, "Array mapping in behavioral synthesis," in Proceedings of the eighth international symposium on System synthesis, pp. 90–95, ACM Press, 1995. ACM Link IEEE Link Local Link

H. Schmit, Synthesis of Application-Specific Memory Structures. PhD thesis, Carnegie Mellon University, November 1995. Local Link

H. Schmit, "Incremental reconfiguration for pipelined applications," in FPGAs for Custom Computing Machines, 1997. Proceedings., The 5th Annual IEEE Symposium on, pp. 16–18, April 1997. IEEE Link Local Link

H. Schmit and D. E. Thomas, "Synthesis of application-specific memory designs," Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 5, pp. 101–111, March 1997. IEEE Link

R. Krishnamurthy, H. Schmit, and L. Carley, "A low-power 16-bit multiplier-accumulator using series-regulated mixed swing techniques," in Custom Integrated Circuits Conference, 1998., Proceedings of the IEEE, pp. 499–502, 1998. IEEE Link Local Link

M. Moe, H. Schmit, and S. Goldstein, "Characterization and parameterization of a pipeline reconfigurable FPGA," in FPGAs for Custom Computing Machines, 1998. Proceedings. IEEE Symposium on, pp. 294–295, 1998. IEEE Link

S. Cadambi, J. Weener, S. C. Goldstein, H. Schmit, and D. E. Thomas, "Managing pipeline-reconfigurable FPGAs," in Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays, pp. 55–64, ACM Press, 1998. ACM Link Local Link

R. D. Blanton, S. C. Goldstein, and H. Schmit, "Tunable fault tolerance via test and reconfiguration," in Fault Tolerance Computing Symposium, 1998. Local Link

B. Klass, D. Thomas, H. Schmit, , and D. Nagle, "Modeling inter-instruction energy effects in a digital signal processor," in Power-Driven Microarchitecture Workshop, International Symposium on Computer Architecture, 1998. Local Link

H. Schmit and J. Don E. Thomas, "Address generation for memories containing multiple arrays," Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 17, pp. 377–385, May 1998. IEEE Link Local Link

C. Inacio, H. Schmit, D. Nagle, A. Ryan, D. E. Thomas, Y. Tong, and B. Klass, "Vertical benchmarks for CAD," in Proceedings of the 36th ACM/IEEE Design Automation Conference, pp. 408–413, ACM Press, 1999. ACM Link IEEE Link Local Link

R. Laufer, R. Taylor, and H. Schmit, "PCI-PipeRench and the SWORDAPI: a system for stream-based reconfigurable computing," in Field-Programmable Custom Computing Machines, 1999. FCCM '99. Proceedings. Seventh Annual IEEE Symposium on, pp. 200–208, 1999. IEEE Link Local Link

S. C. Goldstein, H. Schmit, M. Moe, M. Budiu, S. Cadambi, R. R. Taylor, and R. Laufer, "PipeRench: a co-processor for streaming multimedia acceleration," in Proceedings of the 26th annual International Symposium on Computer Architecture, pp. 28–39, IEEE Computer Society Press, 1999. ACM Link IEEE Link Local Link

B. Ramasubramanian, H. Schmit, and L. R. Carley, "Mixed-swing quadrail for low power dual-rail domino logic," in Proceedings 1999 international symposium on Low power electronics and design, pp. 82–84, ACM Press, 1999. ACM Link IEEE Link Local Link

S. Goldstein, H. Schmit, M. Budiu, S. Cadambi, M. Moe, and R. R. Taylor, "PipeRench: a reconfigurable architecture and compiler," IEEE Computer, vol. 33, pp. 70–77, April 2000. IEEE Link Local Link

B. Levine, R. R. Taylor, and H. Schmit, "Implementation of near Shannon limit error-correcting codes using reconfigurable hardware," in Field-Programmable Custom Computing Machines, 2000 IEEE Symposium on, pp. 217–226, 2000. IEEE Link Local Link

Y. Chou, P. Pillai, H. Schmit, and J. P. Shen, "PipeRench implementation of the instruction path coprocessor," in Proceedings of the 33rd annual ACM/IEEE International Symposium on Microarchitecture, pp. 147–158, ACM Press, december 2000. ACM Link IEEE Link Local Link

M. Moe and H. Schmit, "SCALIP - a scalable IP solution for pipelined arrays with limited feedback," in ASIC/SOC Conference, 2001. Proceedings. 14th Annual IEEE International, pp. 334–338, 2001. IEEE Link Local Link

P. Khosla, H. Schmit, M. Irwin, N. Vijaykrishnan, T. Cain, S. Levitan, and D. Landis, "SoC design skills: collaboration builds a stronger SoC design team," in Microelectronic Systems Education, 2001. Proceedings. 2001 International Conference on, pp. 42–43, 2001. IEEE Link

H. Schmit, D. Whelihan, A. Tsai, M. Moe, B. Levine, and R. R. Taylor, "PipeRench: A virtualized programmable datapath in 0.18 micron technology," in Custom Integrated Circuits Conference, 2002. Proceedings of the IEEE, pp. 63–66, 2002. IEEE Link Local Link

D. Whelihan and H. Schmit, "Memory optimization in single chip network switch fabrics," in Proceedings of the 39th ACM/IEEE Design Automation Conference, pp. 530–535, ACM Press, 2002. ACM Link IEEE Link Local Link

H. Schmit, B. Levine, and B. Ylvisaker, "Queue machines: hardware compilation in hardware," in Field-Programmable Custom Computing Machines, 2002. Proceedings. 10th Annual IEEE Symposium on, pp. 152–160, 2002. IEEE Link Local Link

H. Schmit and V. Chandra, "FPGA switch block layout and evaluation," in Tenth ACM International Symposium on Field-Programmable Gate Arrays, pp. 11–18, ACM Press, 2002. ACM Link Local Link

S. Chiricescu, M. Schuette, R. Glinton, and H. Schmit, "Morphable multipliers," in 12th International Conference on Field Programmable Logic and Applications (FPL) (M. Glesner, P. Zipf, and M. Renovell, eds.), vol. 2438 of Lecture Notes in Computer Science, pp. 647–656, Springer-Verlag, Berlin, 2002. Other Link

V. Chanda and H. Schmit, "Simultaneous optimization of driving buffer and routing switch sizes in an FPGA using an iso-area approach," in VLSI, Annual Symposium on, (ISVLSI), pp. 28–33, IEEE Computer Society, 2002. IEEE Link Local Link

S. Chiricescu, M. Schuette, R. Glinton, and H. Schmit, "Synthesis of morphable multipliers," in 11th IEEE/ACM International Workshop on Logic & Synthesis IWLS02, pp. 109–113, 2002.

A. Koorapaty, V. Chandra, K. Tong, C. Patel, L. Pileggi, and H. Schmit, "Heterogeneous programmable logic block architectures," in Design, Automation and Test in Europe Conference and Exhibition, 2003, pp. 1118–1119, 2003. IEEE Link

M. Moe and H. Schmit, "Floorplanning of pipelined array modules using sequence pairs," in Proceedings of the 2003 International Symposium on Physical Design, pp. 143–150, ACM Press, 2003. ACM Link

C. Patel, A. Cozzie, H. Schmit, and L. Pileggi, "An architectural exploration of via patterned gate arrays," in Proceedings of the 2003 International Symposium on Physical Design, pp. 184–189, ACM Press, 2003. ACM Link

B. Levine and H. Schmit, "Efficient application representation for HASTE: Hybrid architectures with a single, transformable executable," in Field-Programmable Custom Computing Machines, 2003. Proceedings. 11th Annual IEEE Symposium on, pp. 101–110, 2003.

H. Kagotani and H. Schmit, "Asynchronous PipeRench: Architecture and performance estimates," in Field-Programmable Custom Computing Machines, 2003. Proceedings. 11th Annual IEEE Symposium on, pp. 121–129, 2003.

L. Pileggi, H. Schmit, A. Strojwas, P. Gopalakrishnan, V. Kheterpal, A. Koorapaty, C. Patel, V. Rovner, and K. Tong, "Exploring regular fabrics to optimize the performance-cost trade-off," in Proceedings of the 40th ACM/IEEE Design Automation Conference, pp. 782–787, ACM Press, 2003. ACM Link IEEE Link

H. Schmit, T. Kroll, M. Khusid, I. Kourtev, N. Vijaykrishnan, and D. Landis, "The sandbox design experience course," in Microelectronic Systems Education, 2003. Proceedings. 2003 International Conference on, pp. 41–42, 2003. IEEE Link

T. Kroll, H. Schmit, and D. Landis, "CAD tool support for a multi-university SoC certificate program: The digital sandbox," in Microelectronic Systems Education, 2003. Proceedings. 2003 International Conference on, pp. 49–50, 2003. IEEE Link

K. Y. Tong, V. Kheterpal, V. Rovner, L. Pileggi, H. Schmit, and R. Puri, "Regular logic fabrics for a via patterned gate array (VPGA)," in Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE, September 2003.

H. Schmit, "Extra dimenisonal FPGAs," in 13th International Conference on Field Programmable Logic and Applications (FPL) (P. Y. K. Cheung, G. A. Constantinides, and J. T. deSousa, eds.), vol. 2778 of Lecture Notes in Computer Science, pp. 406–415, Springer-Verlag, Berlin, September 2003.

A. Koorapaty, L. Pileggi, and H. Schmit, "Heterogeneous logic block architectures for via-patterned programmable fabrics," in 13th International Conference on Field Programmable Logic and Applications (FPL) (P. Y. K. Cheung, G. A. Constantinides, and J. T. deSousa, eds.), vol. 2778 of Lecture Notes in Computer Science, pp. 426–436, Springer-Verlag, Berlin, September 2003.

Herman Schmit's Publications Page