..::publications::..

Refereed and Invited Conference, Symposium and Workshop Papers

2009

• A. Bonnoit, S. Herbert, D. Marculescu and L. Pileggi, "Integrating Dynamic Voltage/Frequency Scaling and Adaptive Body Biasing using Test-time Voltage Selection" in Proc. of IEEE/ACM Intl. Symposium on Low Power Electronics and Design, Aug. 2009.

• S. Garg, D. Marculescu, R. Marculescu and U. Ogras, "Technology-driven Limits on DVFS Controllability of Multiple Voltage-Frequency Island Designs" in Proc. of IEEE/ACM Design Automation Conference (DAC), Jul. 2009.

• K.-C. Wu and D. Marculescu, "Joint Logic Restructuring and Pin Reordering for Mitigating NBTI-Induced Affects" in Proc. of IEEE/ACM Design, Automation and Test in Europe (DATE), Apr. 2009.

• S. Garg and D. Marculescu, "Process Variability Analysis and Mitigation for 3D MPSoCs" in Proc. of IEEE/ACM Design, Automation and Test in Europe (DATE), Apr. 2009.

• S. Garg and D. Marculescu, "3D GCP - An Analytical Model for the Impact of Process Variations on the Critical Path Delay of 3D ICs" in Proc. of IEEE International Symposium on Quality Electronic Design (ISQED), Mar. 2009.( Best Paper Award)

• W.-P. Lee, Y.-W. Chang, and D. Marculescu , "Post-Floorplanning Power/Ground Ring Synthesis for Multiple-Supply-VoltageDesigns" in Proc. of IEEE/ACM International Symposium on Physical Design (ISPD), Mar. 2009.

• S. Herbert and D. Marculescu, "Variation-Aware Dynamic Voltage/FrequencyScaling" in Proc. of the 15th International Symposium on High-Performance Computer Architecture (HPCA), Feb. 2009.

2008

• N. Miskov-Zivanov, K.-C. Wu, D. Marculescu, "Process Variability-Aware Transient Fault Modeling and Analysis," in Proc. ACM/IEEE Intl. Conference on Computer-Aided Design, San Jose, CA, Nov. 2008.

• K.-C. Wu, D. Marculescu, "Power-Aware Soft Error Hardening via Selective Voltage Scaling," in Proc. ACM/IEEE Intl. Conference on Computer Design, San Jose, CA, October 2008.( Best Paper Award)

• S. Garg, D. Marculescu, "System-Level Mitigation of WID Leakage Variations using Body-Bias Islands," in Proc. ACM/IEEE Intl. Conference on Hardware-Software Codesign and Systems Synthesis (CODES+ISSS), Atlanta, GA, October 2008.

• S. Herbert, D. Marculescu, "Analysis of Variability-Tolerance in Chip-Multiprocessors," in Proc. ACM/IEEE Design Automation Conference (DAC), Anaheim, CA, June 2008.(Paper nominated for Best Paper Award)

• U.Y. Ogras, R. Marculescu, D. Marculescu, "Variation-Adaptive Feedback Control for Networks-on-Chip with Multiple Clock Domains," in Proc. ACM/IEEE Design Automation Conference (DAC), Anaheim, CA, June 2008.(Paper nominated for Best Paper Award)

• N. Miskov-Zivanov, D. Marculescu, "A Systematic Approach to Modeling and Analysis of Transient Faults in Logic Circuits," in Proc. IEEE Intl. Symposium on Quality on Electronic Design (ISQED), San Jose, CA, March 2008.

• K.-C. Wu, D. Marculescu, "Soft Error Rate Reduction Using Redundancy Addition and Removal," in Proc. IEEE/ACM Asian-South Pacific Design Automation Conference (ASPDAC), Seoul, Korea, Jan. 2008

2007

• S. Garg, D. Marculescu, "On the Impact of Manufacturing Process Variations On the Lifetime of Sensor Networks," in Proc. ACM/IEEE Intl. Conference on Hardware-Software Codesign and System Synthesis (CODES-ISSS), Salzburg, Austria, Sept. 2007

• S. Herbert, D. Marculescu, "Analysis of Dynamic Voltage/Frequency Scaling in Chip-Multiprocessors," in Proc. ACM/IEEE Intl. Symposium on Low Power Electronics and Design (ISLPED), Portland, OR, Aug. 2007.

• U.Y. Ogras, R. Marculescu, P. Choudhary, D. Marculescu, "Voltage-Frequency Island Partitioning for GALS-Based Networks-on-Chip," in Proc. ACM/IEEE Design Automation Conference (DAC), San Diego, CA, June 2007.(Paper nominated for Best Paper Award)

• S. Garg, D. Marculescu, System-Level Process Variation Driven Throughput Analysis for Single and Multiple Voltage-Frequency Island Designs," in Proc. IEEE/ACM Design, Automation and Test in Europe (DATE), Nice, France, Apr. 2007.

• N. Miskov-Zivanov, D. Marculescu, "Soft Error Rate Analysis for Sequential Circuits," in Proc. IEEE/ACM Design, Automation and Test in Europe (DATE), Nice, France, Apr. 2007.

• P. Stanley-Marbell, D. Marculescu, " An 0.9 X 1.2', Low Power, Energy-Harvesting System with Custom Multi-Channel Communication Interface" in Proc. Proc. IEEE/ACM Design, Automation and Test in Europe (DATE), Nice, France, Apr. 2007.

• N.Miskov-Zivanov, D.Marculescu, "MARS-S: Modeling and Reduction of Soft Errors in Sequential Circuits," in Proc. IEEE Intl. Symposium on Quality in Electronic Design (ISQED), San Jose, CA, March 2007. (Paper nominated for Best Paper Award)

• P. Stanley-Marbell, D. Marculescu, "Sunflower: Full-System Embedded Microarchitecture Evaluation," in Proc. Intl. Conf. on High Performance Embedded Architectures & Compilers (HiPEAC), Ghent, Belgium, Jan. 2007.

2006

• D. Marculescu, S. Garg, "System-Level Process-Driven Variability Analysis for Single and Multiple Voltage-Frequency Island Systems," in Proc. IEEE/ACM Intl. Conference on Computer-Aided Design (ICCAD), San Jose, CA, Nov. 2006.

• S. Herbert, S. Garg, D. Marculescu, "Reclaiming Performance and Energy Efficiency from Variability," in 4th Annual Thomas J. Watson P=ac2 Conference (PAC2), Yorktown, NY, Oct. 2006.

• P. Choudhary, D. Marculescu, "Hardware based Frequency/Voltage Control of Voltage Frequency Island Systems," in Proc. IEEE/ACM Intl. Conference on Hardware-Software Codesign and System Synthesis (CODES-ISSS), Seoul, South Korea, Oct. 2006.

• P. Stanley-Marbell, D. Marculescu, "A Programming Model and Language Implementation for Concurrent Failure-Prone Hardware," in Workshop on Programming Models for Ubiquitous Parallelism (PMUP), in conjunction with ACM/IEEE Intl. Conf. on Parallel Architectures and Compilation Techniques (PACT), Seattle, WA, Sept. 2006

• N. Miskov-Zivanov, D. Marculescu, "MARS-C: Modeling and Reduction of Soft Errors in Combinational Circuits," in Proc. ACM/IEEE Design Automation Conference (DAC), San Francisco, CA, July 2006.

• C.-H. Chang, D. Marculescu, "Design and Analysis of a Low Power VLIW DSP Core," in Proc. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Karlsruhe, Germany, March 2006.

2005

• K. Niyogi, D. Marculescu, "System Level Power and Performance Modeling of GALS Point-to-point Communication Interfaces,"in Proc. ACM/IEEE Intl. Symposium on Low Power Electronics and Design (ISLPED), San Diego, CA, Aug. 2005.

• D. Marculescu, E. Talpes, "Variability and Energy Awareness: A Microarchitecture-Level Perspective," in Proc. ACM/IEEE Design Automation Conference, (DAC), Anaheim, CA, June 2005.

• E. Talpes, D. Marculescu, "Increased Scalability and Power Efficiency through Multiple Speed Pipelines," in Proc. ACM Intl. Symposium on Computer Architecture (ISCA), Madison, WI, June 2005.

• D. Marculescu, "Energy Bounds for Fault-Tolerant Nanoscale Designs," in Proc. IEEE Design, Automation and Test in Europe, (DATE), Munich, Germany, February 2005. (Paper Nominated for Best Paper Award)

• K. Niyogi, D. Marculescu, "Speed and Voltage Selection for GALS Systems Based on Voltage/Frequency Islands," in Proc. ACM/IEEE Asian-South Pacific Design Automation Conference (ASPDAC), Shanghai, China, Jan. 2005. (Best Paper Award)

2004

• R. Marculescu, D. Marculescu, L. Pileggi, "Toward an Integrated Design Methodology for Fault-Tolerant, Multiple Clock/Voltage Integrated Systems," in Proc. IEEE Intl. Conference on Computer Design (ICCD), San Jose, CA, Oct. 2004. (Invited paper)

• D. Marculescu, "Application Adaptive Energy Efficient Clustered Architectures," in Proc. ACM/IEEE Intl. Symposium on Low Power Electronics and Design (ISLPED), Newport Beach, CA, Aug. 2004.

• E. Talpes, D. Marculescu, "Impact of Technology Scaling on Energy Aware Execution Cache-based Microarchitectures," in Proc. ACM/IEEE Intl. Symposium on Low Power Electronics and Design (ISLPED), Newport Beach, CA, Aug. 2004.

• P. Stanley-Marbell, D. Marculescu, "Local Decisions and Triggering Mechanisms for Adaptive Fault-Tolerance," in Proc. IEEE Design, Automation and Test in Europe Conf. (DATE), Paris, France, Feb. 2004.

• E. Talpes, V.S.P. Rapaka and D. Marculescu, "Mixed-Clock Issue Queue Design for Energy Aware, High-Performance Cores," in Proc. ACM/IEEE Asian-South Pacific Design Automation Conference (ASPDAC), Yokohama, Japan, Jan.2004.

2003

• P. Stanley-Marbell and D. Marculescu, "Dynamic Fault-Tolerance and Metrics for Battery Powered, Failure-Prone Systems," in Proc. IEEE/ACM Intl. Conference on Computer-Aided Design (ICCAD), San Jose, CA, Nov. 2003.

• D. Marculescu, N.H. Zamora, P. Stanley-Marbell and R. Marculescu, "Fault-Tolerant Techniques for Ambient Intelligent Distributed Systems," in Proc. IEEE/ACM Intl. Conference on Computer-Aided Design (ICCAD), San Jose, CA, Nov. 2003.

• V.S.P. Rapaka and D. Marculescu, "A Mixed-Clock Issue Queue Design for Globally Asynchronous, Locally Synchronous Process," in Proc. ACM/IEEE Intl. Symposium on Low Power Electronics and Design (ISLPED), Seoul, Korea, Aug. 2003.

• E. Talpes and D. Marculescu, "A Critical Analysis of Application-Adaptive Multiple Clock Processors," in Proc. ACM/IEEE Intl. Symposium on Low Power Electronics and Design (ISLPED), Seoul, Korea, Aug. 2003.

• P. Stanley-Marbell and D. Marculescu, "Programming Crystalline Hardware," in Workshop on Non-Silicon Computation (NSC), in conjunction with ACM Intl. Symposium on Computer Architecture (ISCA), San Diego, CA., June 2003.

• P. Stanley-Marbell and D. Marculescu, "Dynamic Fault-Tolerance Management in Failure-Prone Battery-Powered Systems," in ACM/IEEE Workshop on Logic and Synthesis (IWLS), Laguna Beach, CA, May 2003.

• M. Lindwer, D. Marculescu, T. Basten, R. Zimmermann, R. Marculescu, S. Jung, and E. Cantatore, "Ambient Intelligence Visions and Achievements: Linking Abstract Ideas to Real-World Concepts," in Proc. IEEE Design, Automation and Test in Europe Conf. (DATE), Munich, Germany, March 2003. (Hot topic session)

• V.S.P. Rapaka and D. Marculescu, "Pre-characterization Free Efficient Power/Performance Analysis of Embedded and General Purpose Software Applications," in Proc. IEEE Design, Automation and Test in Europe Conf. (DATE), Munich, Germany, March 2003.

• S.W. Haga, N. Reeves, R. Barua, and D. Marculescu, "Dynamic Functional Unit Assignment for Low Power," in Proc. IEEE Design, Automation and Test in Europe Conf. (DATE), Munich, Germany, March 2003.

2002

• A. Iyer and D. Marculescu, "Power Efficiency of Multiple Clock, Multiple Voltage Cores," in Proc. IEEE/ACM Intl. Conference on Computer-Aided Design (ICCAD), San Jose, CA, Nov. 2002.

• N. H. Zamora, P. Stanley-Marbell, R. Marculescu and D. Marculescu, "Pre-Copying: An Improved Code Migration Technique for Future Fault-Tolerant Electronic Textiles," in First Workshop on Modeling, Analysis and Middleware Support for Electronic Textiles (MAMSET), in conjunction with ASPLOS, San Jose, CA, October 2002.

• D. Marculescu, R. Marculescu and Pradeep K. Khosla, "Challenges and Opportunities in Electronic Textile Modeling, Analysis and Optimization", International Interactive Textile for the Warrior Conference, Cambridge, MA, July 2002. (Invited poster)

• D. Marculescu, R. Marculescu and Pradeep K. Khosla, "Challenges and Opportunities in Electronic Textile Modeling and Optimization", in Proc. ACM/IEEE Design Automation Conference (DAC), New Orleans, LA, June 2002. (Special session on e-textiles)

• A. Iyer and D. Marculescu, "Power-Performance Evaluation of Globally Asynchronous, Locally Synchronous Processors", in Proc. Intl. Symposium on Computer Architecture (ISCA), Anchorage, AK, May 2002.

• R. Marculescu and D. Marculescu, "Does Q=MC² ?," in Proc. ACM Intl. Symposium on Quality in Electronic Design (ISQED), San Jose, March 2002. (Invited Paper)

2001

• D. Marculescu and A. Iyer, "Application-Driven Processor Design Exploration for Power-Performance Trade-off Analysis," in Proc. IEEE/ACM Intl. Conf. on Computer-Aided Design (ICCAD), San Jose, Nov. 2001.

• E. Talpes and D. Marculescu, "Power Reduction Through Work Reuse", in Proc. ACM Intl. Symposium on Low Power Electronics and Design (ISLPED), Huntington Beach, Aug. 2001.

• A. Iyer and D. Marculescu, "Power Aware Microarchitecture Resource Scaling", in Proc. IEEE Design, Automation and Test in Europe Conf. (DATE), Munich, Germany, March 2001.

2000

• A. Iyer and D. Marculescu, "Run-time Scaling of Microarchitecture Resources in a Processor for Energy Savings", in Proc. KoolChips Workshop, in conjunction with International Symposium on Microarchitecture (MICRO), Monterey, Dec. 2000.

• D. Marculescu, "Power Efficient Processors Using Multiple Supply Voltages", in Proc. Workshop on Compilers and Operating Systems for Low Power, in conjunction with International Conference on Parallel Architectures and Compilation Techniques (PACT), Philadelphia, Oct. 2000.

• D. Marculescu, "Profile-Driven Code Execution for Low Power Dissipation", in Proc. ACM Intl. Symp. on Low Power Design (ISLPED), Rapallo/Portofino Coast, Italy, July 2000.

• D. Marculescu, "On the Use of Microarchitecture-Driven Dynamic Voltage Scaling", in Proc. Workshop on Complexity-Effective Design, in conjunction with Intl. Symp. on Computer Architecture (ISCA), Vancouver, BC, June 2000.

Journal Papers

• S. Herbert, D. Marculescu, "Mitigating the Impact of Variability on Chip-Multiprocessor Power and Performance, " to appear, IEEE Transactions on VLSI Systems.

• S. Garg, D. Marculescu, "System Level Throughput Analysis for Process Variation Aware Multiple Voltage-Frequency Island Designs," to appear, ACM Trans. on Design Automation of Electronic Systems, 2008.

• P. Choudhary, D. Marculescu, "Power Management of Voltage/Frequency Island-Based Systems Using Hardware Based Methods," to appear, IEEE Trans. on VLSI, 2008.

• N. Miskov-Zivanov, D. Marculescu, "Modeling and Optimization for Soft Error Reliability of Sequential Circuits," to appear, IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 2008.

• D. Marculescu, S. Garg, "Process-Driven Variability Analysis for Single and Multiple Voltage-Frequency Island, Latency-Constrained Systems," to appear, IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 2008.

• U.Y. Ogras, R. Marculescu, H.G. Lee, P. Choudhary, D. Marculescu, M. Kaufman, P. Nelson, "Challenges and Promising Results in NoC Prototyping Using FPGAS," in IEEE Micro, vol.27, No.5, Sept-Oct. 2007.

• R.I. Bahar, D. Hammerstrom, J. Harlow, W.H. Joyner Jr., C. Lau, D. Marculescu, A. Orailoglu, M. Pedram, "Architectures for Silicon Nanoelectronics and Beyond," in IEEE Computer, vol. 40, No.1, pp.25-33, Jan. 2007.

• N. Miskov-Zivanov, D. Marculescu, "Circuit Reliability Analysis Using Symbolic Techniques," in IEEE Trans. on Computer Aided Design of Integrated Circuits, Vol.25, No.12, pp.2638-2694, Dec. 2006.

• D. Marculescu, E. Talpes, "Energy Awareness and Uncertainty in Design at Microarchitecture Level," in IEEE Micro, Vol.25, No.5, pp.64-76, September/October 2005. (Special Issue on Energy Efficient Design).

• P. Koopman, H. Choset, R. Gandhi, B. Krogh, D. Marculescu, P. Narasimhan, J.M. Paul, R. Rajkumar, D. Siewiorek, A. Smailagic, P. Steenkiste, D.E. Thomas, C. Wang, "Undergraduate Embedded System Education at Carnegie Mellon," in ACM Trans. on Embedded Computing Systems, vol.4, No.3, pp.500-528, August 2005. (Special Issue on Embedded Systems Education).

• E. Talpes and D. Marculescu, "Reusing Scheduled Instructions for Improving the Power Efficiency of Superscalar Processors," accepted for publication, to appear in IEEE Trans. on VLSI, 2005.

• E. Talpes and D. Marculescu, "Toward a Multiple Clock/Voltage Island Design Style for Power Aware Processors," accepted for publication, to appear in IEEE Trans. on VLSI, 2005.

• D. Marculescu, R. Marculescu, N.H. Zamora, P. Stanley-Marbell, P.K. Khosla, S. Park, S. Jayaraman, S. Jung, C. Lauterbach, W. Weber, T. Kirstein, D. Cottet, J. Grzyb, G. Troester, "Electronic Textiles: A Platform for Pervasive Computing," in Proceedings of IEEE, vol.91, No.12, Dec. 2003.

• P. Stanley-Marbell, D. Marculescu, R. Marculescu, and P.K. Khosla, "Modeling, Analysis and Self-Management of Electronic Textiles," in IEEE Trans. on Computers, vol.52, No.8, Aug. 2003. (Special issue on Wearable Computing).

• A. Iyer and D. Marculescu, "Microarchitecture-level Power Management," in IEEE Trans. on VLSI Systems, vol.10, No.3, June 2002.

• D. Marculescu, R. Marculescu, and M. Pedram, "Theoretical Bounds for Switching Activity Analysis in Finite-State Machines", in IEEE Trans. on VLSI Systems, vol.8, No.3, July 2000.

• D. Marculescu, R. Marculescu, and M. Pedram, "Stochastic Sequential Machines Synthesis with Application to Constrained Sequence Generation," in ACM Trans. on Design Automation of Electronic Systems, vol.5, No.2, Jan. 2000.
  
  
  

Technical Reports

• D. Marculescu, "Fault-Tolerant Nanoscale Design: An Energy Perspective," Sept. 2004 (CMU CSSI 04-33).

• D. Marculescu, "A Case for Application Adaptive, Multiple Clock Clustered Architectures," March 2004 (CMU CSSI 04-34).

• E. Talpes and D. Marculescu, "Toward A Multiple Clock/Voltage Island Design Style for Power Aware Processors," Aug. 2004 (CMU CSSI 04-24).

• E. Talpes and D. Marculescu, "Execution Cache Based Microarchitecture for Power Efficient Superscalar Processors," June 2004 (CMU CSSI 04-21).

• P. Stanley-Marbell and D. Marculescu, "Local Decisions and Triggering Mechanisms for Adaptive Fault-Tolerance," Sept. 2003 (CMU CSSI 04-28).

• P. Stanley-Marbell and D. Marculescu, "Dynamic Fault-Tolerance and Metrics for Battery Powered, Failure-Prone Systems," April 2003 (CMU CSSI 04-30).

• D. Marculescu, N.H. Zamora, P. Stanley-Marbell and R. Marculescu, "Fault-Tolerant Techniques for Ambient Intelligent Distributed Systems," April 2003 (CMU CSSI 03-06).

• A. Iyer and D. Marculescu, "Power Efficiency of Voltage Scaling in Multiple Clock, Multiple Voltage Cores," Sept. 2002 (CMU CSSI 02-36).

• A. Iyer and D. Marculescu, "Power and Performance Evaluation of Globally Asynchronous, Locally Synchronous Processors," May 2002 (CMU CSSI 02-23).

• P. Stanley-Marbell and D. Marculescu, "Exploiting Redundancy through Code Migration in Networked Embedded Systems,", April 2002 (CMU CSSI 02-04).

• P. Stanley-Marbell and D. Marculescu, "Code Migration in Low Power Networked Embedded Systems," February 2002 (CMU CSSI).

• E. Talpes and D. Marculescu, "Asynchronous Communication Effect on the Performance of Multithreaded GALS Processors," December 2001 (CMU CSSI 01-29).

• A. Iyer and D. Marculescu, "Power Aware Microarchitecture Resource Scaling," February 2001 (CMU CAD 01-05).

• D. Marculescu and S.W. Haga, "Adaptive Program Execution for Low Power in Superscalar Processors," October 1999 (UMD TR 99-10).

1999 and earlier:

Please check Diana Marculescu's home page.