//---------------------------------------------------------------------------
//
//       ASSERT_UNCHANGE
//
//---------------------------------------------------------------------------
// NAME
//          ASSERT_UNCHANGE - Clock bounded window expecting a change.
//
//---------------------------------------------------------------------------
module assert_unchange (clk, reset_n, start_event, test_expr);
// synopsys template
  parameter severity_level=0;
  parameter width=1;
  parameter num_cks=1;
  parameter flag=0;
`ifdef ASSERT_V1_0_1 	// Previous version of the library
`else			// New version to allow for future options
  parameter options = 0;
`endif
  parameter msg="VIOLATION";
  input clk;
  input reset_n;
  input start_event;
  input [width-1:0] test_expr;

//synopsys translate_off
`ifdef ASSERT_ON

  parameter UNCHANGE_START = 1'b0;
  parameter UNCHANGE_CHECK = 1'b1;
  parameter FLAG_IGNORE_NEW_START = 2'b00;
  parameter FLAG_RESET_ON_START   = 2'b01;
  parameter FLAG_ERR_ON_START     = 2'b10;

  reg r_change;
  reg [width-1:0] r_test_expr;
  reg r_state;
  integer i;

  initial begin
    if (~((flag == FLAG_IGNORE_NEW_START) ||
          (flag == FLAG_RESET_ON_START) ||
          (flag == FLAG_ERR_ON_START))) begin
      ovl_error("illegal flag parameter");
    end
    r_state=UNCHANGE_START;
    r_change=1'b0;
  end

  parameter assert_name = "ASSERT_UNCHANGE";

  integer error_count;
  initial error_count = 0;

  `include "ovl_task.h"

  `ifdef ASSERT_INIT_MSG
    initial
      ovl_init_msg; // Call the User Defined Init Message Routine
  `endif

  always @(posedge clk) begin
    `ifdef ASSERT_GLOBAL_RESET
      if (`ASSERT_GLOBAL_RESET != 1'b0) begin
    `else      
      if (reset_n != 0) begin  // active low reset
    `endif
        case (r_state)
          UNCHANGE_START:
            if (start_event == 1'b1) begin
              r_change <= 1'b0;
              r_state <= UNCHANGE_CHECK;
              r_test_expr <= test_expr;
              i <= num_cks;
            end
          UNCHANGE_CHECK:
            begin
              // Count clock ticks
              if (start_event == 1'b1) begin
                if (flag == FLAG_IGNORE_NEW_START && i > 0)
                  i <= i-1;
                else if (flag == FLAG_RESET_ON_START)
                  i <= num_cks;
                else if (flag == FLAG_ERR_ON_START) begin
                  ovl_error("illegal start event");
                end
              end
              else if (i > 0) begin
                i <= i-1;
              end

              if (r_test_expr != test_expr) begin
                r_change <= 1'b1;
              end
              // go to start state on last check
              if (i == 1 && !(start_event == 1'b1 &&
                              flag == FLAG_RESET_ON_START)) begin
                r_state <= UNCHANGE_START;
              end
              // Check that the property is true
              if ((r_change == 1'b1) ||
                  (r_test_expr != test_expr)) begin
                ovl_error("");
              end
                r_test_expr <= test_expr;
            end
        endcase
      end
      else begin
        r_state<=UNCHANGE_START;
        r_change<=1'b0;
      end
  end // always
`endif
//synopsys translate_on

endmodule