//---------------------------------------------------------------------------
//
//       ASSERT_TIME
//
//---------------------------------------------------------------------------
// NAME
//          ASSERT_TIME - An invariant concurrent assertion to ensure 
//                      that an expression remains true within a range
//                      of clock cycles.
//
//---------------------------------------------------------------------------
module assert_time (clk, reset_n, start_event, test_expr);
// synopsys template
  input clk, reset_n, start_event, test_expr;
  parameter severity_level = 0;
  parameter num_cks = 1;
  parameter flag = 2'b00; //ignore_new_start
`ifdef ASSERT_V1_0_1 	// Previous version of the library
`else			// New version to allow for future options
  parameter options = 0;
`endif
  parameter msg="VIOLATION";

//synopsys translate_off
`ifdef ASSERT_ON

// local paramaters used as defines
  parameter TIME_START = 1'b0;
  parameter TIME_CHECK = 1'b1;
  parameter FLAG_IGNORE_NEW_START = 2'b00;
  parameter FLAG_RESET_ON_START   = 2'b01;
  parameter FLAG_ERR_ON_START     = 2'b10;

  reg [31:0] i;

  reg r_state;
  initial begin
    if (~((flag == FLAG_IGNORE_NEW_START) ||
          (flag == FLAG_RESET_ON_START) ||
          (flag == FLAG_ERR_ON_START))) begin
      ovl_error("illegal flag parameter");
    end
    r_state=TIME_START;
  end

  parameter assert_name = "ASSERT_TIME";

  integer error_count;
  initial error_count = 0;

  `include "ovl_task.h"

  `ifdef ASSERT_INIT_MSG
    initial
      ovl_init_msg; // Call the User Defined Init Message Routine
  `endif

  always @(posedge clk) begin
    `ifdef ASSERT_GLOBAL_RESET
      if (`ASSERT_GLOBAL_RESET != 1'b0) begin
    `else      
      if (reset_n != 0) begin  // active low reset
    `endif
        case (r_state)
          TIME_START: 
            if (start_event == 1'b1) begin
              r_state <= TIME_CHECK;
              i <= num_cks;
            end
          TIME_CHECK: 
            begin
              // Count clock ticks
              if (start_event == 1'b1) begin
                if (flag == FLAG_IGNORE_NEW_START)
                  i <= i-1;
                else if (flag == FLAG_RESET_ON_START)
                  i <= num_cks;
                else if (flag == FLAG_ERR_ON_START) begin
                  ovl_error("illegal start event");
                end 
              end
              else
                i <= i-1;

              // Check that the property is true
              if (test_expr != 1'b1) begin
                ovl_error("");
              end

              // go to start state on last time check
              // NOTE: i == 0 at end of current simulation 
              // timeframe due to non-blocking assignment!
              // Hence, check  i == 1.
              if (i == 1 && !(start_event == 1'b1 && 
                             flag == FLAG_RESET_ON_START)) 
                r_state <= TIME_START;
            end
        endcase
      end
      else begin
        r_state <= TIME_START;
      end
  end // always

`endif
//synopsys translate_on

endmodule