Implementation and Evaluation of a High-speed Non-blocking Server

Arthur Chang
18-845, Internet Services, Spring 2014

This paper presents an implementation and evaluation of the asymmetric
multi-process event-driven (AMPED) web server architecture. The
motivation for this paper was to gauge the performance of a high-speed
non-blocking (HSNB) web server, like the Flash Web server, on
modern systems.  The AMPED architecture and the Flash Web server were
originally presented in [4] as an alternative HSNB architecture to
multi- threaded (MT), multi-process (MP), and single-process event
driven (SPED) systems. In 1999, Flash purported SPED-like performance
on cached workloads. Unlike SPED however, the use of concurrency by
Flash’s AMPED architecture provides performance rivaling that of MT
and MP systems on disk-bound workloads.

In this paper, we present our re-evaluation of the AMPED architecture
by implementing the Flash web server for modern systems. Where the
original Flash spawned helper processes for I/O blocking operations,
the implementation presented in this paper makes use of modern
threading libraries, which readily provides kernel support. This is
but one of several differences between the two studies. Like the
original study, Flash remains competitive against other architectures
like MT, MP, and SPED. However, our findings show that modern systems
have advanced beyond many of the original concerns addressed by AMPED,
at the time of its creation.