Multi-Processor System-on-Chip (MPSoC) design is an outgrowth and a composite of ASIC design and embedded systems design, primarily targeted as satisfying the demands of portable and handheld computing. MPSoCs currently have 5-10 heterogeneous processing elements (PEs). Tens or even hundreds of PEs of a dozen or more types are projected in the future. Because of the many PEs on single chips, there is an increased emphasis on programmability of the chip as a whole. Analogies to custom-designed supercomputers on single chips have been drawn. However, even as these systems are appearing, the design tools and strategies for these systems lag behind other more established approaches to single chip design. This course discusses the variety of approaches that have been proposed for next generation MPSoC design. We'll consider representations and models of computation, analysis methods, and architectural alternatives for these systems.
This term we will most likely use the text, Multiprocessor Systems-on-Chips, A. Jerraya and W. Wolf, Eds, Morgan Kaufmann, 2004. Each chapter provides a fundamental overview of a current research topic in MPSoC design. The course will include lectures, intermixed with discussions, projects, readings and assignments to enhance your understanding of digital system design at this level.