~~NOTOC~~
<note important> **This page is open for editing by anybody.\\ Please be courteous to your fellow students.** </note> 

====== Project Presentations ======
Please use this page to schedule your project presentation. Look up your project number from the list below and then reserve a presentation slot by inserting your project number and last names in the tables below. Before leaving the wiki, make sure that your changes have been saved. \\ 

<note tip>
Presentation slots are 8 min long. Be concise! < 8 bullets/slide, LARGE FONTS
Talk about the most important things. Your talk is an advertisement for your work, not a complete summary. You MUST downsample, so do it well.
See David Patterson's [[http://www.cs.berkeley.edu/~pattrsn/152F97/slides/lec20-badtalk.pdf|How to Give a Bad Talk advice]]
</note>

====== List of Projects ======
List of projects sorted alphabetically.
  - S. Aboutalib & R. Meireles: Feature Selection for Data Prefetchers → Evangelos
  - R. Aggarwal & M. Telgarsky: Memory Hierarchies for Parallelized DFTs → Evangelos
  - L. Akoglu & C. U. Ezekwe: FREQuest: Prefetching in the light of Frequent Episodes → Evangelos
  - M. Beckler & V. Chandrasekaran: Automatic Phase Detection and Adaptation for an Asymmetric Multi-Core Environment → Evangelos
  - Y. Cai & K. Woo: Hardware Implementation of Bufferless Routers → Michael
  - T. Cartolano & G. Nychis: QoS and Fairness in Bufferless Interconnection On-Chip Networks → Michael
  - J. Cheung & M. Ma: Fault Tolerance Architectural Techniques for Efficiently Recovering from Detected Hardware Design Bugs → Michael
  - J. H. Cho: Prefetch-Aware Fair Cache Partitioning → Theo
  - A. Gandhi & Y. Zhuang: Analytical Modeling of System Temperature → Theo
  - D. Han & Y. Kim: Preserving Bank Parallelism in Multiple Multicore Memory Controllers → Theo
  - A. Hartman & C. Tseng → Michael
  - T. Iwanaga & C. Liao: Dynamic Hardware Thread Scheduling in SIMD pipelines → Theo
  - R. Koutsoyannis & R. Sachdeva: Prefetching in a distributed cache system → Evangelos
  - J. Lin & Y. Wu: QoS Aware (Fair) Memory Controllers in the presence of Prefetching → Michael
  - B. Nowak & S. Thompson: Asymmetric MultiCore → Evangelos
  - M. Polte & R. J. Simmons: Attacking and defending PCM-based main memory → Theo
  - A. Sangpetch & K. Vaniea: Visualizing Cache Utilization for Optimizations → Michael
  - Yianli Li & Xin Zhang: More is Less: Denial-of-Service Attacks to Multi-Core Systems → Theo
 

====== Presentations ======

**Wednesday, Apr 29 2009, 08:30am - 11:20am** 
^Slot^Project Number and Names^
| 8:30am : 8:38am | 7, Cheung, Ma |
| 8:40am : 8:48am | 15, Thompson, Nowak |
| 8:50am : 8:58am | 2, Telgarsky |
| 9:00am : 9:08am | Your project number, Last name 1, Last name 2 |
| 9:10am : 9:18am | 6, Cartolano, Nychis |
| 9:20am : 9:28am | 17, Vaniea, Sangpetch |
| 9:30am : 9:38am | 11, Hartman, Tseng |
| 9:40am : 9:48am | 1, Aboutalib, Meireles |
| 9:50am : 9:58am | 14, Wu, Lin |
| 10:00am : 10:08am | 18, Li, Zhang |
| 10:10am : 10:18am | 5, Cai, Woo |
| 10:20am : 10:28am | 3, Ezekwe, Akoglu |
| 10:30am : 10:38am | 9, Gandhi, Zhuang |
| 10:40am : 10:48am | 13, Sachdeva, Koutsoyannis |
| 10:50am : 10:58am | 16, Polte, Simmons |
| 11:00am : 11:08am | 10, Han, Kim |
| 11:10am : 11:18am | 12, Iwanaga, Liao |