techdocs
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techdocs [2015/01/10 21:00] kevincha |
techdocs [2015/04/20 20:06] rachata |
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| * {{lc3b-figures.pdf|LC-3b Figures from Appendix C}} | * {{lc3b-figures.pdf|LC-3b Figures from Appendix C}} | ||
| * {{18447-lc3b-pipelining.pdf|Pipelined LC-3b Microarchitecture}} | * {{18447-lc3b-pipelining.pdf|Pipelined LC-3b Microarchitecture}} | ||
| + | |||
| + | ==== ARM ==== | ||
| + | * ARM Architecture Reference Manual | ||
| + | * [[https://www.scss.tcd.ie/~waldroj/3d1/arm_arm.pdf|Manual (5MB)]] | ||
| + | * ARM Architecture Instruction Quick Reference | ||
| + | * {{arm-instructionset.pdf|Quick Ref (.5MB)}} | ||
| + | * ARM university teaching material: {{http://www.arm.com/support/university/educators/architecture/index.php| Link}} | ||
| + | * There are interesting and potentially useful slides on the ARM ISA: | ||
| + | * {{http://www.arm.com/files/ppt/ARM_Teaching_Material.ppt| ARM Teaching material}} | ||
| + | * {{http://www.arm.com/files/ppt/ARM_Processors_and_Architectures_-_Uni_Program_.pptx| ARM Univ. Program}} | ||
| + | * {{http://www.arm.com/files/pdf/ARM_Arch_A8.pdf| A8 Architecture}} | ||
| ===== Software Tools ===== | ===== Software Tools ===== | ||
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| ==== Cadence ==== | ==== Cadence ==== | ||
| * ''ncvlog.pdf'': {{ncvlog.pdf| Cadence NC-Verilog Simulator Help 8.2 (2008)}} | * ''ncvlog.pdf'': {{ncvlog.pdf| Cadence NC-Verilog Simulator Help 8.2 (2008)}} | ||
| - | * ''simvision.pdf'': {{simvision.pdf|SimVision User Guide 8.2 (2009)}} | ||
| - | * ''simviscmdref.pdf'': {{simviscmdref.pdf|SimVision Command Language Reference 8.2 (2009)}} | ||
| ==== Xilinx ==== | ==== Xilinx ==== | ||
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| * {{18447-sv-to-verilog.pdf|18-447 Handout: Moving from System Verilog to Verilog}} | * {{18447-sv-to-verilog.pdf|18-447 Handout: Moving from System Verilog to Verilog}} | ||
| * [[http://users.ece.utexas.edu/~patt/12s.382N/tools/verilog_manual.html|Online Verilog Manual (UT-Austin EE 382N)]] | * [[http://users.ece.utexas.edu/~patt/12s.382N/tools/verilog_manual.html|Online Verilog Manual (UT-Austin EE 382N)]] | ||
| + | * {{hdlcv.pdf|HDL Compiler for Verilog Reference Manual by Synopsys.}} | ||
techdocs.txt · Last modified: 2015/04/20 22:40 by rachata
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