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homeworks [2013/01/31 16:11] jasonli1 [Homework 1: Instruction Set Architecture (ISA) (Due: Mon. 1/28)] |
homeworks [2013/05/04 21:14] (current) yoonguk |
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| ===== Homework 0: Student Information (Due: Wed. 1/23) ===== | ===== Homework 0: Student Information (Due: Wed. 1/23) ===== | ||
| - | * {{:hw0.pdf|HW0 Handout}} | + | * {{hw0.pdf|HW0 Handout}} |
| ===== Homework 1: Instruction Set Architecture (ISA) (Due: Mon. 1/28) ===== | ===== Homework 1: Instruction Set Architecture (ISA) (Due: Mon. 1/28) ===== | ||
| - | * {{:hw1.pdf|HW1 Handout}} | + | * {{hw1.pdf|HW1 Handout}} |
| - | * {{:hw1_solution.pdf|HW1 Solutions}} | + | * {{hw1_solution.pdf|HW1 Solutions}} |
| + | * {{hw1_dist.pdf|HW1 Score Distribution}} | ||
| ===== Homework 2: ISA Tradeoffs (Due: Mon. 2/11) ===== | ===== Homework 2: ISA Tradeoffs (Due: Mon. 2/11) ===== | ||
| - | * {{:hw2.pdf|HW2 Handout}} | + | * {{hw2.pdf|HW2 Handout}} |
| - | * {{:microcode.csv|microcode.csv}} | + | * {{microcode.csv|microcode.csv}} |
| + | * {{hw2_solution.pdf|HW2 Solutions}} | ||
| + | * {{hw2_dist.pdf|HW2 Score Distribution}} | ||
| + | |||
| + | ===== Homework 3: Microprogramming Wrap-up and Pipelining (Due: Mon. 2/25) ===== | ||
| + | * {{hw3.pdf|HW3 Handout}} | ||
| + | * {{:repmovsb.csv|repmovsb.csv}} | ||
| + | * {{hw3_solution.pdf|HW3 Solutions}} | ||
| + | |||
| + | ===== Homework 4: Pipelining and Out-of-order Processing (Due: Mon. 3/18) ===== | ||
| + | * {{hw4.pdf|HW4 Handout}} | ||
| + | * {{hw4_solution.pdf|HW4 Solutions}} | ||
| + | * {{hw4_dist.pdf|HW4 Score Distribution}} | ||
| + | |||
| + | ===== Homework 5: SIMD, VLIW, Virtual Memory, and Caching (Due: Wed. 4/3)===== | ||
| + | * {{hw5.pdf|HW5 Handout}} | ||
| + | * {{hw5_solution.pdf|HW5 Solutions}} | ||
| + | * {{hw5_dist.pdf|HW5 Score Distribution}} | ||
| + | |||
| + | ===== Homework 6: Caching and Memory (Due: Mon. 4/22)===== | ||
| + | * {{hw6.pdf|HW6 Handout}} | ||
| + | * {{hw6_solution.pdf|HW6 Solutions}} | ||
| + | * {{hw6_dist.pdf|HW6 Score Distribution}} | ||
| + | |||
| + | ===== Homework 7: Coherence, Prefetching, Parallelism and Topologies (Due: NONE)===== | ||
| + | * {{hw7.pdf|HW7 Handout}} | ||
| + | * {{hw7_solution.pdf|HW7 Solutions}} | ||