Welcome to 18-447, Introduction to Computer Architecture.
Grades for the course have been released on Blackboard.
The distribution of grades and related statistics may be found here.
Please fill out course evaluations for 447. Here is the message from Professor Mutlu, explaining why this is important.
Dear 447 students,
I hope you enjoyed 447 and both learned fundamentals and gained hands-on processor design experience in this course that you will use for years to come.
Please fill out the online course evaluations for 447 and me by the deadline, May 15.
Getting feedback from you is a very important aspect of the education I would like to give as a professor. So, please fill out the evaluation forms as thoroughly as possible. I carefully read all of the comments written, value them highly, and use them to improve all aspects of the course: the material, logistics, teaching, assignments, etc. I appreciate your help in making this course an enriching and hopefully exciting educational experience for future students. Of course, all comments you provide are anonymous.
You can perform the evaluation at: http://cmu.onlinecourseevaluations.com
Also, if you would like to talk to me about anything, feel free to stop by my office next week (please make an appointment to make sure I am in). In particular, if you are interested in computer architecture research, thinking about taking 742 next semester, or looking for a job in computer architecture or a related area, I would be happy to help.
In addition to the FCE, we would appreciate if you took a few minutes to provide feedback to our TAs as well. You can provide feedback via these anonymous surveys:
Chris Fallin: http://www.surveymonkey.com/s/CX28R6P
Lavanya Subramanian: http://www.surveymonkey.com/s/27SKGLM
Abeer Agrawal: http://www.surveymonkey.com/s/CZJCNQ2
- There is no lecture on Jan 16, due to Martin Luther King Day. The first lecture will be held on Jan 18. (See our lecture schedule for more details.)
- There is no lab session on Jan 17. Lab sessions start on Jan 19.
- Lab 1 and Homeworks 0, 1 posted
- Homework 2 posted (due February 13)
- Lab 2 is released (due February 17)
- Homework 3 posted (due February 27)
- Lab 3 is released (due March 2)
- Homework 4 posted (due March 19)
- Lab 4 is released (due March 23)
- Homework 5 posted (due April 2)
- Lab 5 is released (due April 6)
- Please fill out the Feedback Sheet with any comments you have for us (due March 25). You can email your response to email@example.com or turn in a hardcopy in class (anonymously if you wish)
- Homework 6 posted (due April 16)
- Lab 6 is released (due April 23)
- The final exam will be on Thursday, May 10, at 5:30pm – 8:30pm. The room is WEH 7500.
- Lab 7 is released (due May 4)
- Regrade policy for Lab 6, and late-day policy for Lab 6 and Lab 7, updated on Labs page
- Additional office hours (see below) and final review session (Margaret Morrison A14, Tue May 8, 5:30pm) announced.
- Homework 7 posted. You do not need to turn it in. It is to help you prepare for the exam.
- Final exam solutions posted.
- Lab 7 grades released.
Computer architecture is the science and art of selecting and interconnecting hardware components and designing the hardware/software interface to create a computer that meets functional, performance, energy consumption, cost, and other specific goals. This course introduces the basic hardware structure of a modern programmable computer, including the basic laws underlying performance evaluation. We will learn, for example, how to design the control and data path hardware for a MIPS-like processor, how to make machine instructions execute simultaneously through pipelining and simple superscalar execution, and how to design fast memory and storage systems. The principles presented in the lecture are reinforced in the laboratory through the design and simulation of a register transfer level (RTL) implementation of a MIPS-like pipelined processor in Verilog. In addition, we will develop a cycle-accurate simulator of this processor in C, and we will use this simulator to explore processor design options.
Prerequisites: 18-240 and (15-213 or 18-243) and (18340 or 18341 or 18348 or 18349 or 18320)
- Lecture: MW 12:30pm – 2:20pm, HH-B103
- Lab Section A: Tues 10:30am – 1:20pm, HH-1112 (TA: Chris)
- Lab Section B: Thurs 1:30pm – 4:20pm, HH-1112 (TA: Lavanya)
- Lab Section C: Fri 6:30pm – 9:20pm, HH-1112 (TA: Abeer)
- Final Exam: Thurs May 10, 2012, at 5:30pm – 8:30pm, Wean 7500
- Computer Organization and Design: The Hardware/Software Interface, Fourth Edition by Patterson and Hennessy, Morgan Kaufmann/Elsvier. (Required)
- HDL Compiler for Verilog Reference Manual by Synopsys, Inc. /afs/ece/class/ece447/docs/synopsys/top.pdf.
- Introduction to Computing Systems: From Bits and Gates to C and Beyond, Second Edition by Patt and Patel, McGraw-Hill.
- Computer Organization by Hamacher, Vranesic, and Zaky, McGraw-Hill.
- Computer Architecture and Implementation by Harvey Cragon, Cambridge University Press.
- Structured Computer Organization by Andrew Tanenbaum, Prentice Hall.
Note: you may email the course instructor and TAs at firstname.lastname@example.org.
|Instructor||Onur Mutluemail@example.com||Hamerschlag Hall A305||412-268-1186||Wed. 2:30–3:30pm|
|Grad TA||Chris Fallinfirstname.lastname@example.org||CIC 4th Floor||Fri. 2:00–4:00pm (HH-1304). Extra End-of-Semester: Sunday 3:00pm–5:00pm (CIC 4th Floor)|
|Grad TA||Lavanya Subramanianemail@example.com||CIC 4th Floor||Thu. 11:30am–1:30pm (HH-1304). Extra End-of-Semester: Saturday 1.00pm–3.00pm (HH 1304)|
|Undergrad TA||Abeer Agrawalfirstname.lastname@example.org||End-of-Semester: Tuesday 3.00pm–5.00pm (HH 1303 Cluster)|
|Admin Assistant||Shannon Lownemail@example.com||Hamerschlag Hall D-Level Course Hub||412-268-5568|