• D. Marculescu, "Fault-Tolerant Nanoscale Design: An Energy Perspective," Sept. 2004 (CMU CSSI 04-33).

  • D. Marculescu, "A Case for Application Adaptive, Multiple Clock Clustered Architectures," March 2004 (CMU CSSI 04-34).

  • E. Talpes and D. Marculescu, "Toward A Multiple Clock/Voltage Island Design Style for Power Aware Processors," Aug. 2004 (CMU CSSI 04-24).

  • E. Talpes and D. Marculescu, "Execution Cache Based Microarchitecture for Power Efficient Superscalar Processors," June 2004 (CMU CSSI 04-21).

  • P. Stanley-Marbell and D. Marculescu, "Local Decisions and Triggering Mechanisms for Adaptive Fault-Tolerance," Sept. 2003 (CMU CSSI 04-28).

  • P. Stanley-Marbell and D. Marculescu, "Dynamic Fault-Tolerance and Metrics for Battery Powered, Failure-Prone Systems," April 2003 (CMU CSSI 04-30).

  • D. Marculescu, N.H. Zamora, P. Stanley-Marbell and R. Marculescu, "Fault-Tolerant Techniques for Ambient Intelligent Distributed Systems," April 2003 (CMU CSSI 03-06).

  • A. Iyer and D. Marculescu, "Power Efficiency of Voltage Scaling in Multiple Clock, Multiple Voltage Cores," Sept. 2002 (CMU CSSI 02-36).

  • A. Iyer and D. Marculescu, "Power and Performance Evaluation of Globally Asynchronous, Locally Synchronous Processors," May 2002 (CMU CSSI 02-23).

  • P. Stanley-Marbell and D. Marculescu, "Exploiting Redundancy through Code Migration in Networked Embedded Systems,", April 2002 (CMU CSSI 02-04)

  • P. Stanley-Marbell and D. Marculescu, "Code Migration in Low Power Networked Embedded Systems," February 2002 (CMU CSSI).

  • E. Talpes and D. Marculescu, "Asynchronous Communication Effect on the Performance of Multithreaded GALS Processors," December 2001 (CMU CSSI 01-29).

  • A. Iyer and D. Marculescu, "Power Aware Microarchitecture Resource Scaling," February 2001 (CMU CSSI 01-05).

  • D. Marculescu and S.W. Haga, "Adaptive Program Execution for Low Power in Superscalar Processors," October 1999 (UMD TR 99-10).

  • D. Marculescu, R. Marculescu, and M. Pedram, "Steady-State Probability Estimation in FSMs Considering High-Order Temporal Effects," April 1997 (USC CENG 97-19).

  • D. Marculescu, R. Marculescu, and M. Pedram, "FSM Analysis Using High-Order Markov Models," October 1996 (USC CENG 97-08).

  • R. Marculescu, D. Marculescu, and M. Pedram, "Vector Compaction Using Hierarchical Markov Models," October 1996 (USC CENG 97-07).

  • D. Marculescu, R. Marculescu, and M. Pedram, "Constrained Sequence Generation Using Stochastic Sequential Machines," March 1996 (USC CENG 96-16).

  • R. Marculescu, D. Marculescu, and M. Pedram, "Vector Compaction Using Dynamic Markov Models," February 1996 (USC CENG 96-14).

  • D. Marculescu, R. Marculescu, and M. Pedram, "RT-level Power Analysis Using Information Theoretic Measures," December 1995 (USC CENG 95-25).

  • R. Marculescu, D. Marculescu, and M. Pedram, "Switching Activity Analysis Based on Conditional Independence," February 1995 (USC CENG 95-04).

  • R. Marculescu, D. Marculescu, and M. Pedram, "Logic Level Power Estimation Considering Spatiotemporal Correlations," April 1994 (USC CENG 94-05).

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