Electrical & Computer Engineering     |     Carnegie Mellon

Tuesday, March 3, 12:00-1:00 p.m. HH-1112


Sebastian Herbert
Sebastian Herbert
Carnegie Mellon University

Variation-Aware Dynamic Voltage/Frequency Scaling

Fine-grained dynamic voltage/frequency scaling (DVFS) is an important tool in managing the balance between power and performance in chip-multiprocessors. Although manufacturing process variations are giving rise to significant core-to-core variations in power and performance, traditional DVFS controllers are unaware of these variations.

Exploiting the different power/performance profiles of the cores can significantly improve energy-efficiency. Two hardware DVFS control algorithms are considered and the gains enabled by incorporating variability-awareness are demonstrated on multithreaded commercial workloads. For a design with per-core voltage/frequency islands (VFIs), the mean power per unit throughput for a simple threshold-based controller is reduced by 8.0% when variability-awareness is added. A complex greedy-search controller sees an even larger reduction of 15.4%.

Designs which apply DVFS at a coarser granularity are also considered, and the variability-aware schemes maintain significant improvement over the -unaware ones. With four cores per VFI, variability-awareness reduces power/throughput by 6.5% and 9.2% for the threshold-based and greedy-search controllers, respectively.


Sebastian Herbert is a PhD student in the ECE Department working with Prof. Diana Marculescu. His research focuses on the design of energy-efficient and variability-tolerant multicore architectures.