Mudit Bhargava Carnegie Mellon University

Low-Overhead, Digital Offset Compensated, SRAM Sense Amplifiers

Device variability in modern processes has become a major concern in SRAM design, degrading performance, yield, power, and reliability. While low-swing bitlines can reduce power consumption and increase performance, offset in the sense amplifiers due to device variability hinders the scalability of this technique. A promising method for decreasing the offset is post-silicon tuning using digitally controlled offset compensation. Thus, we have designed and implemented low-overhead, digital offset compensated, SRAM sense amplifiers using both the latch-style and StrongARM topologies. Measured results from a 4mm² testchip design in a 45nm bulk CMOS process containing 3000 sense amplifier instances per chip show that we can reduce the standard deviation of offset by over 5x.

Bio:

Mudit Bhargava received his B.Tech.(Hons.) from the Department of Electronics and Electrical Communications Engineering, Indian Institute of Technology, Kharagpur, India in 2002. He worked in the Embedded SRAM Design Group, ST Microelectronics, India from 2002 to 2006. He holds two patents during his work at ST Microelectronics. He has been pursuing PhD in Dept of ECE, CMU since Fall 2006 and is advised by Prof Ken Mai. He worked as a summer intern at Freescale Semiconductors in 2008. His research interests include design of high performance and robust digital circuits with a focus on memory design.