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Yen-Tzu Lin
Carnegie Mellon University |
Physically-Aware N-Detect Test Pattern Selection
The objective of VLSI testing is to screen out failing parts caused by defects in the manufacturing process. Defect behaviors are modeled as faults which serve as the targets during test generation. As minimal feature size shrinks and circuit complexity increases, the behavior of defects involves more complex mechanisms and can no longer be captured by simple fault models. Complex fault models are developed to closely emulate possible defect behaviors encountered in the manufacturing process. These models target some specific behaviors of defects, and in turn are still limited to those behaviors. On the other hand, N-detect test was proposed to improve defect coverage without drastically increasing complexity in terms of modeling and test generation. By exploiting defect locality, the quality of N-detect test sets can be further improved.
In this talk, a generalized approach to generate compact and effective test sets that have a higher capability to detect unmodeled defects is presented. We discuss a physically-aware N-detect test selection approach for creating the objective test set which is guided by layout information. Results for two industrial designs will be presented to demonstrate the effectiveness and practicability of our approach.
Yen-Tzu Lin received her B.S. and M.S degrees in electrical engineering from National Tsing Hua University in 2000 and 2002, respectively. She is currently a Ph.D. candidate in the department of Electrical and Computer Engineering at Carnegie Mellon University, advised by Professor Shawn Blanton. Her research
interests include various aspects of VLSI testing, such as layout-driven test generation, test compaction, and test for yield learning.
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