Electrical & Computer Engineering     |     Carnegie Mellon

Tuesday, February 20, 12:15-1:15 p.m. HH-1112

 

Dr. Paul P. Sotiriadis
Johns Hopkins University

Diophantine Frequency Synthesis: A Number Theory Approach to Fine RF Frequency Synthesis

Fine‑frequency synthesis is of fundamental importance in positioning and navigation (GPS), time keeping (atomic clocks), scientific instrumentation, medical imaging equipment and high speed data communication.  Traditional fine‑frequency synthesis requires a trade off between resolution, range, spectral purity, agility (hopping speed) and physical size which generally limits the design options and often eliminates potential application solutions.
       
This talk will introduce the "Diophantine Frequency Synthesis" (DFS), a new, general high‑level frequency synthesis approach that is based on mathematical properties of integer numbers and Diophantine equations.  DFS overcomes the inherent constraint between frequency step (resolution) and phase‑comparator (reference) frequency in phase‑locked‑loop based frequency synthesis; leading to extremely fine‑step, fast hopping synthesizers of modular structure with potentially very low spurs, especially near the carrier.  The focus of the talk will be on the principles and the potential applications of DFS.

Bio:

Dr. Paul P. Sotiriadis received the diploma in Electrical Engineering and Computer Science from the National Technical University of Athens (NTUA), Greece in 1994 with the highest ever GPA. He received the M.S. degree in Electrical Engineering from Stanford University and the Ph.D. degree in Electrical Engineering and Computer Science from the Massachusetts Institute of Technology, in 2002; since then, he has been an assistant professor with the Department of Electrical and Computer Engineering at The Johns Hopkins University. 

His research interests include design, optimization, and mathematical modeling of analog and mixed‑signal circuits, RF and microwave circuits, frequency synthesis, and interconnect networks in deep‑sub‑micron technologies.   He has about 40 publications in IEEE transactions and international conferences. He has served in the technical committees of several conferences as well as in NSF review panels. He is currently an associate editor of the IEEE Transactions on Circuits and Systems‑II.