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Brett Meyer
Carnegie Mellon University
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Simultaneous Synthesis of Buses, Data Mapping and Memory Allocation for MPSoC
Heterogeneous multiprocessors are emerging as the dominant implementation approach to embedded multiprocessor systems. In addition to having processing elements suited to the target applications, these systems will also have custom memory and bus architectures. Because of performance and cost constraints, these systems must be carefully designed to balance system partitioning and resource sharing. The sheer size of the design space requires that tools be able to do this balancing.
In this talk I'll first present an augmented simulated annealing synthesis tool that uses system performance and layout evaluation to drive simultaneous data mapping, memory allocation and bus synthesis. Performing these optimizations at the same time, our tool is able to explore a larger design space and take advantage of cost-saving resource sharing unavailable to previous approaches that allocate memories before synthesizing buses. This results in 20% cost reduction for high-performance designs as well as 27% for low-cost designs in comparison with an approach that performs memory allocation and data mapping separately from bus synthesis.
In the near future, it is expected to become increasingly important that these systems be designed with reliability in mind. As semiconductor manufacturing transitions deeper into sub-micron feature sizes, rising failure and defect rates will force designers to consider reliability for all designs. I'll introduce a design framework we are developing which achieves low-cost reliability through carefully distributing excess resources to minimize performance degradation in the presence of a known component failure distribution.
Brett H. Meyer is a PhD candidate advised by Professor Don Thomas in the Department of Electrical and Computer Engineering at Carnegie Mellon University. He received his B.S. in electrical engineering from the University of Wisconsin-Madison in 2003, and his M.S. in electrical and computer engineering from Carnegie Mellon University in 2005. His research is presently focused on the design of reliable embedded systems.
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