Electrical & Computer Engineering     |     Carnegie Mellon

Tuesday, May 16, 12:00-1:00 p.m. HH-1112


Jared Smolens
Carnegie Mellon University

On-line Error Detection for Commodity Microprocessors using Fingerprinting

Future microprocessors will be increasingly susceptible to soft errors from many sources, including increasing integration, decreasing node capacitances and process variation. Detecting these errors in a timely and cost-efficient manner is a key problem in designing high-reliability computer systems. In this talk, I present two forms of fingerprinting, a low-overhead error detection technique that detects architectural differences in execution across redundant processor cores. Microarchitectural fingerprints capture a cumulative summary of values on internal data and control path nodes in the microprocessor. These can be implemented with small modifications to existing design-for-test hardware, but require processor cores to operate in lock-step. Architectural fingerprints summarize a processor's recent architectural state updates in a small signature, without capturing timing-dependent behavior. These require modest additions to the microprocessor's retirement stages, but eliminate the lock-step requirement. In this talk, I will show how these fingerprinting mechanisms work and how they can be implemented in an existing commodity microprocessor design.


Jared Smolens is a PhD candidate in the ECE department at Carnegie Mellon University, where he is advised by Prof. James Hoe. He received his BS and MS in ECE from Carnegie Mellon University. His research interests are in multiprocessor and microprocessor architectures, fault tolerance, and performance modeling. He spent this past summer working to prove out fingerprinting at Intel.