Electrical & Computer Engineering     |     Carnegie Mellon

Tuesday, April 11, 12:00-1:00 p.m. HH-1112


Marios Papaefthymiou
University of Michigan, Ann Arbor

Energy Recovery VLSI Design

About three decades ago theoretical physicists suggested that the controlled recovery of charge could yield electronic circuitry that dissipates significantly less power than conventional CMOS.  Early work in this field, which became generally known as adiabatic computing, focused on the asymptotic energetics of computation, yielding reversible designs that approach thermodynamic limits of energy efficiency when operating at arbitrarily slow speeds.  In this talk, I will first give a brief overview of energy recovery design.  I will then move on to describe three energy recovery chips that have been designed in my research group.  Giving up on reversibility, these chips operate fast while enabling the recovery of a substantial fraction of their power. The most recent of the three chips has been designed in a 0.13um bulk silicon process with on-chip inductors, achieving clock rates in excess of 1GHz and energy recovery rates greater than 60%.


Marios Papaefthymiou is Professor of EECS and Director of the Advanced Computer Architecture Laboratory (ACAL) at the Univesity of Michigan.