Electrical & Computer Engineering     |     Carnegie Mellon

Monday, April 10, 12:00-1:00 p.m. HH-1112


R. Jacob Baker
Boise State University

Designing CMOS Circuits for the Next Generation of Solid-State Memory Technology

The current solid-state nonvolatile memory market is dominated by MOS technology that uses floating gate MOSFETs (Flash memory). Flash technology is mature but faces some difficult issues with regard to scaling and thus increased density. A class of memory cells currently under development is based on magnetic- and glass-based materials that display resistive characteristics. The variation of the resistance with some applied electrical stimulus must be sensed and interfaced with standard CMOS electronics. This talk will provide: an overview of resistive memory cell operation, design concerns when sensing to keep from affecting the contents of the cell while maximizing the signal available for sensing, and how precision components can be eliminated with the use of some simple signal processing techniques. The talk will conclude with a design example showing how the techniques can be applied to solve the sensing problem in a magnetic RAM.


R. Jacob Baker is Professor/Chair in a new electrical and computer engineering program at Boise State University and a senior design engineer for Micron Technology, Inc., Boise, Idaho. He is the author of the books "CMOS Circuit Design, Layout, and Simulation," and "CMOS Mixed Signal Circuit Design." Professor Baker's research interests are in the areas of mixed-signal circuit design and the design of memory in new fabrication technologies. He also holds over 100 granted or pending patents in integrated circuit design.