Electrical & Computer Engineering     |     Carnegie Mellon

Thursday, February 3, 12:00-1:00 p.m. HH-1112


Saurabh Tiwary
Carnegie Mellon University

Scalable Trajectory Methods for On­Demand Analog Macromodel Extraction

There has been a growing emphasis on the design of analog and mixed-signal circuits today. Simulators, however, have failed to keep pace with the ever-increasing complexity of modern circuits. Thus, it is often the case that system level verification is done using very simplistic models of underlying circuit blocks. The full SPICE level simulation of the systems is often done only at tape-out as these simulations very easily take days to complete. Thus, there is an ever-increasing need for macromodels which would reliably capture the behavior of the circuits they are modeling while still simulating faster.

In this talk, a new macromodeling flow for analog circuits would be discussed that has been implemented into Berkeley-SPICE3f5. The basic idea behind the modeling approach is trajectory based model order reduction. We capture linearized reduced-order snapshots of the dynamics of a non-linear circuit as it moves through regions of its state-space. These linearized models are then used during the simulation of the macromodel to predict the state-space equation for the circuit at a new point in state-space using interpolation. Efficient model pruning and nearest neighbor lookup mechanisms have been implemented for fast evaluation and simulation of the macromodel. The generated macromodel can also be plugged back into a SPICE netlist as a native SPICE element (very much like resistors, capacitors etc.) to replace its parent circuit in a system level simulation context. Experimental results would be presented showing the efficacy of the modeling approach using a 40 transistor folded cascode opamp circuit and a sample and hold circuit which has the opamp as one of its constituent blocks.


Saurabh Tiwary is a Ph.D. student in the Electrical and Computer Engineering department at CMU. He received his B.Tech. degree from Indian Institute of Technology, Kanpur in 2001 and his Masters degree from CMU in 2002. His research interests include macromodeling and synthesis of analog circuits and mixed-signal systems.