| January |
| 28 |
Yang Xu |
ECE Ph.D. Student |
ORACLE:
Optimization with Recourse of Analog Circuits including Layout Extraction |
| February |
| 4 |
Georges Gielen |
Katholieke Universiteit Leuven |
Analog
Performance Modeling for Analog Circuit Synthesis |
| 18 |
James Ma |
ECE Ph.D. Student |
Large-Scale
Placement by Grid-Warping |
| March |
| 3 |
Stephen Edwards |
Columbia University |
Making
Cyclic Circuits Acyclic |
| April |
| 14 |
Girish Venkataraman |
Ph.D. Candidate, Carnegie Mellon University |
C
to Asynchronous Dataflow Circuits: An End-to-End Toolflow |
| 19 |
Carolyn Block |
Intel Corporation |
Silicon
Research at Intel |
| July |
| 14 |
Hank Walker |
Texas A&M University |
Defect-Based
Delay Test and Statistical Timing Analysis of Integrated Circuits |
| September |
| 1 |
Jan M. Rabaey |
University of California at Berkeley |
Disappearing
Electronics Enable Ambient Intelligence |
| 29 |
Larry Pileggi |
Carnegie Mellon University |
Structured
Layout for Extreme Scaled CMOS |
| October |
| 7 |
Satoshi Inaba |
Toshiba Corporation |
Key
Technologies for Advanced CMOS Devices Beyond 65 nm Node Generation |
| 13 |
Richard Schreier |
Analog Devices Inc. |
An
IF-to-Bits Converter IC, or, How to Make an ADC with Inductors |
| 20 |
Patrick Yue |
Carnegie Mellon University |
Designing
ESD Protection for RF ICs |
| 27 |
Michael H. Perrott |
Massachusetts Institute of Technology |
A
Mixed-Signal Approach to Phase-Locked Loops |
| 29 |
Ran Ginosar |
Technion - Israel Institute of Technology |
Synchronization
in Multiple-Clock-Domain Systems on Chip |
| November |
| 3 |
Masoud Zargari |
Atheros Communications |
A
Single-Chip Dual-Band Tri-Mode CMOS Transceiver for IEEE 802.11a/b/g
WLAN |
| 12 |
Hiroshi Nakamura |
University of Tokyo |
Dynamic
Processor Throttling for Power-Efficient Computing |
| December |
| 1 |
Zhong Xiu |
Carnegie Mellon University |
Large-Scale
Placement by Grid Warping |
| 8 |
Patrick Bourke |
Carnegie Mellon University |
Speech
Recognition in Silicon |
| 15 |
Anton Pfeiffer |
Carnegie Mellon University |
Automatic
Design of Multiplexed Biofluidic Microchips |