Electrical & Computer Engineering     |     Carnegie Mellon

Wednesday, April 16 , 12:00-1:00 p.m. HH-1112


Thomas Vogels
Carnegie Mellon University

Current Current Testing and Future Use of Current Testing

For the last twenty-two years, testing of CMOS circuits based on measurements of quiescent power supply currents (IDDQ) has been championed as useful for detection of defective or weak integrated circuits (ICs). In the last twenty-two years, however, technology has progressed quickly and 'traditional' IDDQ tests are no longer effective. This talk will present some recent IDDQ-based test methods, e.g. Delta-IDDQ, Current Ratios, and Current Signatures.

In the second part of the talk, we will show what windows of information open up when the limitations of these methods are seen instead as opportunities to observe the analog behavior of the circuit. As a complimentary tool to IDDQ tests and voltage tests, an analysis of a circuit's changing power supply current in response to a varying power supply voltage can be useful to detect parametric or catastrophic outliers. We present test methods based on the current vs voltage functions and evaluate the effectiveness of the different methods using data collected on ASICs.

Thomas Vogels received his Dipl.-Ing. degree from the Technical University of Munich in 1997. For six months he continued his work in testing of analog ICs at the Institute of Electronic Design Automation at the Technical University of Munich. In the fall of 1997 he joined Carnegie Mellon to pursue his Ph.D. degree with Prof. W. Maly as his advisor. His research is focused on parametric tests and outlier detection—this time for digital ICs. He has worked with the test strategy group at IBM during his summer internships. His research interests also include digital test and diagnosis. Tom spends his little spare time training his not so little dog, Jerry, using operant conditioning.