Electrical & Computer Engineering     |     Carnegie Mellon

Wednesday, February 5, 12:00-1:00 p.m. HH-1112


Herman Schmit
Carnegie Mellon University
PipeRench: Architecture and Performance Estimation PipeRench is a configurable architecture that has the unique ability to virtualize an application using dynamic reconfiguration. This paper investigates the potential benefits and costs of implementing this architecture using an asynchronous methodology. Since clock distribution and gating is relatively easy in PipeRench, we focus on the benefit due to decreased timing pessimism in asynchronous implementation. Two architectures for fully asynchronous implementation are considered. Tile-based asynchronous implementation yields approximately 80% improvement in performance per stripe. This implementation, however, requires significant increases in configuration storage and wire count. A few particular features of the architecture, such as the crossbar interconnect structure within the stripe, are primarily responsible for this growth in configuration bits and wires. This talk will present these results, and discuss some of the lessons learned about building an asynchronous programmable fabric.

Herman Schmit received the B.S.E. degree in Computer Science Engineering from University of Pennsylvania in 1987 and the Ph.D. degree from Carnegie Mellon University in 1995. He is currently a Assistant Professor at CMU. Before to coming to Carnegie Mellon, oh so many years ago, he was a memory system designer at a company called Data General.